This patch adds more documenting comments to libfdt.h. Specifically,
these document the read/write functions (not including fdt_open_into()
and fdt_pack(), for now).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds some more documenting comments to libfdt.h.
Specifically this documents all the write-in-place functions.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Implement a suggestion by Scott Wood to make the /chosen handling fine
grained. Don't overwrite pre-existing properties on a per-property basis,
so if /chosen exists but a necessary /chosen/property doesn't, it gets
created. If a /chosen property exists, it is NOT overwritten unless the
"force" flag is true.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Add a note that "fdt copy" makes the new address active.
Remove most of the extra hints at the end of the fdt help.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Fix a bug found and documented by Bartlomiej Sieka where the optional
value on "fdt set <path> <prop> [<val>]" wasn't optional.
=> fdt mknode / testnode
=> fdt print /testnode
testnode {
};
=> fdt set /testnode testprop
=> fdt print /testnode
testnode {
testprop;
};
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
fdt_find_and_setprop() is used by several 4xx boards and it's
missing in the appropriate header. This patch eliminates a
warning when building U-Boot for such boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Acked-by: Stefan Roese <sr@denx.de>
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Make libfdt the default for the WRS SBC8349 board.
Parallel of commit 35cc4e4823
done for the other 83xx based boards. Also fix a typo in CONFIG_PCI.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
This adds libfdt support code for the Wind River sbc8349 board.
Parallel of commit 3fde9e8b22 for
the other Freescale 83xx boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
ECC code is now shared for all 83xx boards, so remove board specific one.
See commit daab8c67d2 for reference.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The MPC8360E MDS config defined:
CONFIG_OF_HAS_BD_T
CONFIG_OF_HAS_UBOOT_ENV
Which we don't use or ever needed. This seems like copy-paste feature creep.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for 837x.
This change guarantees that the environment will be located on the
first flash sector after the U-Boot image.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards. This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Now that there are no board-specific versions of
"denali_core_search_data_eye()", the weak binding on the common version
can be removed.
Signed-off-by: Larry Johnson <lrj@acm.org>
On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch makes two additions to GPIO support:
First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).
Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".
According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output. The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers. The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output. For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).
Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option. This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1". The first option is used when the "out_val" element is
set to "GPIO_OUT_0". Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
When CONFIG_NET_DO_NOT_TRY_ANOTHER is defined U-Boot's
networking stack does not automatically switch to
another interface. This patch does not touch the default
behavior.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch modifies the return code handling in the eth_init()
function, to be compatible with the handling of the return codes in
the other network stack files. It now returns a 0 on Success and -1 on
error.
Signed-off-by: Upakul Barkakaty <upakul.barkakaty@conexant.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Assigning the output of simple_strtoul(CB:A9:87:65:43:21) to `char', we are
warned as below:
U-Boot 1.2.0 (Aug 30 2007 - 08:27:37)
DRAM: 256 MB
Flash: 32 MB
In: serial
Out: serial
Err: serial
Net: NEC-Candy
Warning: NEC-Candy MAC addresses don't match:
Address in SROM is 00:00:4C:80:92:A2
Address in environment is FFFFFFCB:FFFFFFA9:FFFFFF87:65:43:21
This patch changes env_enetaddr type from `char' to `unsigned char'.
Cc: Masaki Ishikawa <ishikawa-masaki@cnt.mxe.nes.nec.co.jp>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
David Gibson
Gerald Van Baren
Matthias Fuchs
Stefan Roese
Wolfgang Denk
Kim Phillips
Paul Gortmaker
Joakim Tjernlund
Kumar Gala
Dave Liu
Anton Vorontsov
Timur Tabi
Peter Pearse
Larry Johnson
Larry Johnson
Upakul Barkakaty
Shinya Kuribayashi