dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally. Remove the unused/untested code.
change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output. The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts. Set as inputs for safety.
replace a few magic numbers with defines
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Add FEC Buffer descriptors and data buffer in SRAM for
faster execution and access.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The only board using this driver is the SL8245 board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added board_eth_init() function to bf537-stamp board.
Removed initialization for the Blackin EMAC driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes a problem that RTL8110SCL started transfer
with an incorrect memory address.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The received status and len was in little endian
format and caused the ethernet unable to proceed
further. Add __le16_to_cpu() in dm9000_rx_status_8/16/32bit().
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This PCI-X e1000 variant works by just adding in the correct
PCI IDs in the appropriate places.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Remove duplicate definitions in include/lxt971a.h.
Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Renesas SH7763 has 2 channel Ethernet device.
This is 10/100/1000 Base support.
But this patch check 10/100 Base only.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
If enable DEBUG, can not compile ne2000 driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
According to the Application Notes of the DM9000, only the 2 bits 0:1 of
the status byte need to be checked to identify a valid packet in the fifo
But, The several different Application Notes do not all speak the same
language on these bits. They do not disagree, but only 1 Application Note
noted explicitly that only these 2 bits need to be checked.
Even the datasheets do not mention anything about these 2 bits.
Because the old code, and the kernel check the whole byte, I left this piece
untouched.
However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so
it should work.
Notice, that the 2nd iteration through this receive loop (when a 2nd packet is
in the fifo) is much shorter now, compared to the older U-boot driver code,
so that we can maybe run into a hardware condition now that was never seen
before, or maybe was seen very unfrequently.
Additionaly added a cleanup of a stack variable.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
A last minute cleanup before submitting the DM9000A patch series yesterday introduced
a bug in reading the rx-status registers in 32bit mode only.
This patch repairs this.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some lines of the U-boot DM9000x driver are longer than 80 characters, or
need some other minor cleanup.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DM9000A network controller does not work with the U-boot DM9000x driver.
Analysis showed that many incoming packets are lost.
The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
check for a valid rx packet be done on the interrupt status register, not
directly by performing the dummy read and the rx status check as is currently
the case in the u-boot driver.
When the recommended poll is done as suggested the driver starts working
correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
can be more than 1 package in the fifo at the same time.
The driver must perform the rx-status check in a loop and read and handle all
packages until there is no more left _after_ the interrupt RX flag is set.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
reset procedure must be done twice to properly reset the DM9000 by means of software.
This errata is not needed anymore for the DM9000A, but it does not bother it.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The eth_send routine of the U-boot DM9000x driver does not match the
DM9000 or DM9000A application notes/programming guides.
This change improves the stability of the DM9000A network controller.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
It seems that the debugging code of the DM9000x driver in U-boot has not been
compiled for a long time, because it cannot compile...
Also rearranged some loglines to get more useful info while debugging.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The U-boot DM9000x driver contains a compile time bus-width definition for
the databus connected to the network controller.
This compile check makes the code unclear, inflexible and is unneccessary.
It can be asked to the network controller what its bus-width is by reading bits
6 and 7 of the interrupt status register.
The linux kernel already uses a runtime mechanism to determine this bus-width,
so the implementation below looks somewhat like that implementation.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
and Tx clock lines. They are configured using 2 bits in extended
register 0x17.
Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
--
drivers/net/tsec.c | 6 ++++++
drivers/net/tsec.h | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
The ethernet hang is caused by receiving buffer in DRAM is not
yet ready due to access cycles require longer time in DRAM.
Relocate DMA buffer descriptors from DRAM to internal SRAM.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Move non-inlied functions into specific drivers file
Set get_prom as weak
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remove a redundant register definition, clean up some coding style
violations.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Jean-Christophe PLAGNIOL-VILLARD
Andrew Dyer
TsiChung Liew
Ben Warren
Yoshihiro Shimoda
Stefan Roese
Wolfgang Denk
Paul Gortmaker
Hugo Villeneuve
Nobuhiro Iwamatsu
Nobuhiro Iwamatsu
Shinya Kuribayashi
Remy Bohmer
Wolfgang Grandegger
Ron Madrid
Jens Gehrlein
Stelian Pop
Andre Schwarz
Guennadi Liakhovetski
Guennadi Liakhovetski