This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
Acked-by: Tom Rini <trini@ti.com>
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
The value from TRIM is not working for some 4430 silicons.
So, override with hw team recommended value. However, for
4460 TRIM value shall be used as long as the part is trimmed
This fixes boot problem on some OMAP4430 ES2.0 Panda boards
out there.
Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:
1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly loads kernel.
2. Align the CONFIG_SYS_TEXT_BASE between TI internal
U-Boot and mainline U-Boot. This avoids a lot of confusion
and allows for the inter-operability of x-loader, SPL,
internal U-Boot, mainline U-Boot etc. The internal U-Boot's
address can not be changed to that of mainline U-Boot
as internal U-Boot doesn't have relocation and 0x80100000
used by mainline U-Boot will clash with kernel
3. Assume only a minimum amount of memory that may be available
on any practical OMAP4/5 board in future too. We are assuming
a minimum of 128 MB of memory
Signed-off-by: Aneesh V <aneesh@ti.com>
There was a typo in the EMIF driver. It went un-noticed
because it affected only when automatic detection is enabled
and even then half the memory was configured and identified
properly.
Reported-by: Rockefeller <rockefeller.lin@innocomm.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
TPS power IC is controlled using a GPIO (gpio_wk7).
This GPIO should be maintained at logic 1 always. As
such an internal pull-up on this pin will do the job,
driving the GPIO outuput is not needed. This will avoid
the need of using GPIO library in SPL and also may
save some power.
Signed-off-by: Aneesh V <aneesh@ti.com>
Improve the tool that finds multiplier and divider for PLLs:
The previous algorithm could get stuck on local maxima
and required the user to specify the tolerance. Improve
the algorithm to go through the entire search space and find
the optimal solution.
Signed-off-by: Aneesh V <aneesh@ti.com>
The vector is not correctly setup in armv7 except for OMAP3.
Correcting this.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
This allows SPL to have default implementation of
save_boot_params(), useful for SoCs that do
not intend to override this default implementation
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
We were not disabling external caches before jumping
to kernel. We were flushing all caches including
external caches and disabling caches globally in
CP15 System Control register. Apparently this is not
enough.
The bootstrap loader in Linux kernel that does decompression
enables data-caches again, flush them after use and disable
them before jumping to kernel proper. However, it's not aware
of the external caches.
Since we have left external cache enabled, external cache will
get used once caches are enabled globally, but it's not flushed
because decompressor is not aware of external caches. When it
jumps to kernel with caches disabled globally, we have stale
data in the external cache and a coherency problem.
This was breaking the boot for OMAP4 with latest mainline
kernel. The solution is to disable external caches in
cleanup_before_linux(). With this fix kernel is booting again.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
This patch fixes the clear bss loop for bss sections that have
zero length, i.e., where __bss_start == __bss_end__.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Add missing u-boot-spl.lds, convert bitshifts to division,
convert to spl_onenand_load_image()
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
The start.S on PXA was very obscure. This reworks it back to be close to arm1136
start.S and others.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Don't compile in relocation support if building SPL
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.
This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.
Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
Functions often used in SPL are now part of linux/mtd/nand.h.
Static modifiers are removed from these functions in
drivers/mtd/nand/nand_base.c.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Cc: scottwood@freescale.com
Cc: s-paulraj@ti.com
Cc: albert.u.boot@aribaud.net
Acked-by: Scott Wood <scottwood@freescale.com>
Add support for the Ethernut 5 open hardware design, based
on Atmel's AT91SAM9XE512 SoC.
V4
- Fix several coding style issues.
- Move machine type to config file.
- Remove use of CONFIG_ATMEL_LEGACY.
Signed-off-by: Tim Schendekehl <tim.schendekehl@egnite.de>
This patch groups together all the common functions for LaCie boards:
Ethernet PHY and MAC address initializations.
Moreover the configurations for LaCie Kirkwood boards are merged into
a single file: include/configs/lacie_kw.h
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
This patch adds support for the LaCie 2Big Network v2 board, based on
the Marvell Kirkwood 6281 SoC.
Additional information is available at:
http://lacie-nas.org/doku.php?id=2big_network_v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Consider that ide_preinit() succeed if at least one port is successfully
initialized. This allows to iniatialize IDE support on a board with two
SATA ports but a single hard disk available.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Fix errors noticed after enabling CONFIG_EFI_PARTITION
for the OMAP3 EVM board:
part_efi.c: In function 'print_part_efi':
part_efi.c:133:5: warning: passing argument 3 of 'is_gpt_valid'
from incompatible pointer type
part_efi.c:95:12: note: expected 'struct gpt_header *' but arg
ument is of type 'struct gpt_header **'
part_efi.c: In function 'get_partition_info_efi':
part_efi.c:173:4: warning: passing argument 3 of 'is_gpt_valid
' from incompatible pointer type
part_efi.c:95:12: note: expected 'struct gpt_header *' but arg
ument is of type 'struct gpt_header **'
part_efi.c: In function 'alloc_read_gpt_entries':
part_efi.c:384:18: error: 'CONFIG_SYS_CACHELINE_SIZE' undeclare
d (first use in this function)
Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Anton staaf <robotboy@chromium.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
When building u-boot as 64 bit application (e.g. sandbox) ulong might be
64 bits in size. This breaks network code as IPaddr_t is 64 bytes in
size then and an IPv4 address is 32 bits in size. This patch makes sure
that IPaddr_t is always 32 bits in size. Also some warnings introduced
by this patch are fixed.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Thomas Weber
Aneesh V
Christian Riesch
Marek Vasut
Simon Schwarz
Tim Schendekehl
Ajay Bhargav
Simon Guinot
Sanjeev Premi
Matthias Weisser