With these documented, we can start pushing towards standardizing their
use across boards.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.
JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.
On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.
For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/http://www.linux-mips.org/wiki/Ingenic
This patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.
To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:
setenv ddr_interactive on
After reset, U-boot prompts before initializing DDR controllers
FSL DDR>
The available commands are
print print SPD and intermediate computed data
reset reboot machine
recompute reload SPD and options to default and recompute regs
edit modify spd, parameter, or option
compute recompute registers from current next_step to end
next_step shows current next_step
help this message
go program the memory controller and continue with u-boot
The first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some previous changes added code right in the middle of the
description of CONFIG_SHOW_BOOT_PROGRESS. Move this text down.
Fix formatting while we are at it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is long over due. All but two net drivers have been converted, but
those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Allow redirection of console output prior to console initialisation to a
temporary buffer.
To enable this functionality, the board (or arch) must define:
- CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer
- CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer
- CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes)
The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes
Any earlier characters are silently dropped.
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.
CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file. Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.
CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.
Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot). All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.
README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Amend section 'Directory Hierarchy' for current MIPS directory.
Describe config options for MIPS.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
For people who want to manually extract the embedded environment so that
it can be manually packed into the final u-boot image, add a config opt
to force building of the envcrc tool.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Add a new "fdt_high" enviroment variable. This can be used to control (or prevent) the
relocation of the flattened device tree on boot. It can be used to prevent relocation
of the fdt into highmem. The variable behaves similarly to the existing "initrd_high"
variable.
Signed-off-by: David A. Long <dave.long@linaro.org>
Some Renesas SuperH have MMCIF module. This driver supports it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Andy Fleming <afleming@freescale.com>
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430
Add support for some of the key PL310 operations
- Invalidate all
- Invalidate range
- Flush(clean & invalidate) all
- Flush range
Signed-off-by: Aneesh V <aneesh@ti.com>
- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU
- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions will affect both L1 and L2 caches. In Cortex-A9
these will affect only L1 cache
- D-cache operations supported:
- Invalidate entire D-cache
- Invalidate D-cache range
- Flush(clean & invalidate) entire D-cache
- Flush D-cache range
- I-cache operations supported:
- Invalidate entire I-cache
- Add maintenance functions for TLB, branch predictor array etc.
- Enable -march=armv7-a so that armv7 assembly instructions can be
used
Signed-off-by: Aneesh V <aneesh@ti.com>
This patch adds support for 16 bit NAND devices attached to the
NDFC on ppc4xx processors. Two config entries were added:
CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a
16 bit device is attached.
CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus
Controller configuration register.
Also, a new ndfc_read_byte() function was added which does not
first convert the data to little endian.
The NAND SPL was also modified to do 16bit bad block testing
when a 16 bit chip is being used.
Signed-off-by: Alex Waterman <awaterman@dawning.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it. Drop it.
This includes support for VFD displays which have always been used by
this board only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
We assumed that only a small set of compatiable strings would be needed
to find the PCIe device tree nodes to be fixed up. However on newer
platforms the simple rules no longer work. We need to allow specifying
the PCIe compatiable string for each individual SoC.
We introduce CONFIG_SYS_FSL_PCIE_COMPAT for this purpose and set it if
the default isn't sufficient.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now that we have the documentation, the code should be changed to reflect
it ;)
Asd far as I can see, these are the places where HW_WATCHDOG is used
instead of WATCHDOG:
arch/blackfin/cpu/blackfin/watchdog.c
arch/m68k/cpu/mcf547x_8x/cpu.c
The relevant maintainers are on CC.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Two new options:
CONFIG_PL011_SERIAL_RLCR
Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers. Set
this variable to initialize the extra register.
CONFIG_PL011_SERIAL_FLUSH_ON_INIT
On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART. Define this
variable to flush the UART at init time.
empty fifo on init
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Although most IDE controller is designed to be connected to PCI bridge,
there are still some IDE controller support AHB interface for SoC design.
The driver implementation of these IDE-AHB controllers differ from other
IDE-PCI controller, some additional registers and commands access is required
during CMD/DATA I/O. Hence a configuration "CONFIG_IDE_AHB" in cmd_ide.c is
required to be defined to support these kinds of SoC controllers. Such as
Faraday's FTIDE020 series and Global Unichip's UINF-0301.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Introduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because
different SoCs have different divisor amounts. All the PQ3 parts are
/8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration. Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.
The old definition of the "monitor" environment variable only determines
which video port to use for output. This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port. The
resolution was hard-coded into board-specific code. The Linux command-line
arguments needed to be hard-coded to the proper video definition string.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
u-boot environments, esp. when boards are shared across multiple
users, can get pretty large and time consuming to visually parse.
The grepenv command this patch adds can be used in lieu of printenv
to facilitate searching. grepenv works like printenv but limits
its output only to environment strings (variable name and value
pairs) that match the user specified substring.
the following examples are on a board with a 5313 byte environment
that spans multiple screen pages:
Example 1: summarize ethernet configuration:
=> grepenv eth TSEC
etact=FM1@DTSEC2
eth=FM1@DTSEC4
ethact=FM1@DTSEC2
eth1addr=00:E0:0C:00:8b:01
eth2addr=00:E0:0C:00:8b:02
eth3addr=00:E0:0C:00:8b:03
eth4addr=00:E0:0C:00:8b:04
eth5addr=00:E0:0C:00:8b:05
eth6addr=00:E0:0C:00:8b:06
eth7addr=00:E0:0C:00:8b:07
eth8addr=00:E0:0C:00:8b:08
eth9addr=00:E0:0C:00:8b:09
ethaddr=00:E0:0C:00:8b:00
netdev=eth0
uprcw=setenv ethact $eth;setenv filename p4080ds/R_PPSXX_0xe/rcw_0xe_2sgmii_rev2_high.bin;setenv start 0xe8000000;protect off all;run upimage;protect on all
upuboot=setenv ethact $eth;setenv filename u-boot.bin;setenv start eff80000;protect off all;run upimage;protect on all
upucode=setenv ethact $eth;setenv filename fsl_fman_ucode_P4080_101_6.bin;setenv start 0xef000000;protect off all;run upimage;protect on all
usdboot=setenv ethact $eth;tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/initramfs.cpio.gz.uboot;tftp c00000 $dir/p4080ds-usdpaa.dtb;setenv bootargs root=/dev/ram rw console=ttyS0,115200 $othbootargs;bootm 1000000 2000000 c00000;
=>
Example 2: detect unused env vars:
=> grepenv etact
etact=FM1@DTSEC2
=>
Example 3: reveal hardcoded variables; e.g., for fdtaddr:
=> grepenv fdtaddr
fdtaddr=c00000
nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr
ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
=> grep $fdtaddr
fdtaddr=c00000
my_boot=bootm 0x40000000 0x41000000 0x00c00000
my_dtb=tftp 0x00c00000 $prefix/p4080ds.dtb
nohvboot=tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/$ramdiskfile;tftp c00000 $dir/$fdtfile;setenv bootargs root=/dev/ram rw ramdisk_size=0x10000000 console=ttyS0,115200;bootm 1000000 2000000 c00000;
=>
This patch also enables the grepenv command by default on
corenet_ds based boards (and repositions the DHCP command
entry to keep the list sorted).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
If FB address is defined specific address then don't grab memory for LCD
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
This patch adds a function getenv_bootm_mapsize() for obtaining the
size of the early mapped region accessible by the kernel during early
boot. It defaults to CONFIG_SYS_BOOTMAPSZ, or if not defined,
defaults to getenv_bootm_size(), which in turn defaults to the size of
RAM.
getenv_bootm_mapsize() can also be overridden with a "bootm_mapsize"
environmental variable.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Rename STANDALONE_LOAD_ADDR into CONFIG_STANDALONE_LOAD_ADDR
and allow that the architecture-specific default value gets
overwritten by defining the value in the board header file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Tsi Chung Liew <tsi-chung.liew@freescale.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Clean up the macro defintions used to enable DIU (video) support on the
MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS,
which is newer. Add software cursor support to all three boards.
Also document the CONFIG_FSL_DIU_FB in the README.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.
This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.
This patch is tested with compilation for armada100 and guruplug.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Some CPU needs cache handling. So this patch add the config of
CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Documented is CONFIG_CMD_SHA1, through confusion in the source
CONFIG_CMD_SHA1 and CONFIG_CMD_SHA1SUM has to be used to enable
sha1sum.
Fix both, the documentation and the source, so that only
CONFIG_CMD_SHA1SUM is needed to enable the command sha1sum.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Jason Hobbs
Xiangfu Liu
York Sun
Che-liang Chiou
Wolfgang Denk
Mike Frysinger
Graeme Russ
Timur Tabi
Andreas Bießmann
Daniel Schwierzeck
Michael Jones
Aneesh V
Igor Grinberg
David A. Long
Yoshihiro Shimoda
Alex Waterman
Kumar Gala
Luca Ceresoli
Detlev Zundel
John Rigby
Macpaul Lin
Kim Phillips
Minkyu Kang
Matthias Weisser
Grant Likely
Heiko Schocher
Lei Wen
Alexander Holler