Since 2bf36ac638 the BD ram address is
not hardcoded inside cpsw driver any more. Platforms have to supply
their bd_ram_ofs in the platform data to the driver. This commit does
this for pcm051 and igep0033 boards.
Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
We can run the DDR at 400MHz, so update the timings for that purpose.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this
for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1
in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and
then using that name in code.
Signed-off-by: Tom Rini <trini@ti.com>
We will not use CYGNUS names for any IGEP COM based on AM335x processor,
so, to avoid confusion, remove from headers.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
move uart soft reset code to common place and call
this function from board code, instead of copy and paste
this code for every board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matt Porter <mporter@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Tom Rini <trini@ti.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Tom Rini <trini@ti.com>
[trini: Fix igep0033 build, remove 'regval' on pcm051]
Signed-off-by: Tom Rini <trini@ti.com>
move rtc32k_enable() to common place so all am33xx boards can use it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matt Porter <mporter@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Tom Rini <trini@ti.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
We need to call the save_omap_boot_params function on am33xx/ti81xx and
other newer TI SoCs, so move the function to boot-common. Only OMAP4+
has the omap_hw_init_context function so add ifdefs to not call it on
am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx
boards.
Reviewed-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
The IGEP COM AQUILA and CYGNUS are industrial processors modules with
following highlights:
o AM3352/AM3354 Texas Instruments processor
o Cortex-A8 ARM CPU
o 3.3 volts Inputs / Outputs use industrial
o 256 MB DDR3 SDRAM / 128 Megabytes FLASH
o MicroSD card reader on-board
o Ethernet controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Masahiro Yamada
Wolfgang Denk
Lars Poeschel
Enric Balletbo i Serra
Heiko Schocher
Tom Rini
Lokesh Vutla