The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:
Add support for i386 architecture and AMD SC520 board
* Patch by Pierre Aubert, 12 Nov 2002:
Add support for DOS filesystem and booting from DOS floppy disk
Chris Zankel
Thomas Chou
Nobuhiro Iwamatsu
Michal Simek
Haavard Skinnemoen
Aubrey.Li
Wolfgang Denk
Wolfgang Denk
wdenk