upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Chris Zankel de5e5cea02 xtensa: add support for the xtensa processor architecture [1/2] ... The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>		8 years ago
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byteorder	…
mtd	…
unaligned	…
usb	…
apm_bios.h	…
bch.h	…
bitops.h	…
bitrev.h	…
bug.h	…
compat.h	…
compiler-clang.h	…
compiler-gcc.h	…
compiler-intel.h	…
compiler.h	…
crc7.h	…
crc8.h	…
crc32.h	…
ctype.h	…
drm_dp_helper.h	…
edd.h	…
err.h	…
ethtool.h	…
fb.h	…
immap_qe.h	…
input.h	…
io.h	…
ioctl.h	…
ioport.h	…
kbuild.h	…
kconfig.h	…
kernel.h	…
linkage.h	…
linux_string.h	…
list.h	…
list_sort.h	…
log2.h	…
lzo.h	…
math64.h	…
mbus.h	…
mc146818rtc.h	…
mdio.h	…
mii.h	…
netdevice.h	…
poison.h	…
posix_types.h	…
psci.h	…
rbtree.h	…
rbtree_augmented.h	…
screen_info.h	…
serial_reg.h	…
sizes.h	…
stat.h	…
stddef.h	…
string.h	…
stringify.h	…
time.h	…
types.h	…