upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Andy Fleming e76cd5d4cf 8xxx: Change all 8*xx_DDR addresses to 8xxx ... There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Andy Fleming <afleming@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>		12 years ago
..
Makefile	…
common_timing_params.h	…
ctrl_regs.c	8xxx: Change all 8*xx_DDR addresses to 8xxx	12 years ago
ddr.h	…
ddr1_dimm_params.c	…
ddr2_dimm_params.c	…
ddr3_dimm_params.c	…
interactive.c	powerpc/mpc8xxx: Update DDR registers	12 years ago
lc_common_dimm_params.c	arch/powerpc/cpu/mpc8xxx/: sparse fixes	12 years ago
main.c	powerpc/mpc8xxx: Fix DDR SPD failed message	12 years ago
options.c	powerpc/mpc8xxx: Add auto select bank interleaving mode	12 years ago
util.c	8xxx: Change all 8*xx_DDR addresses to 8xxx	12 years ago