upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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96 lines
2.3 KiB
96 lines
2.3 KiB
/*
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* Lowlevel setup for SMDK5250 board based on S5PC520
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*
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* Copyright (C) 2012 Samsung Electronics
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/arch/cpu.h>
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_TEXT_BASE:
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.word CONFIG_SYS_TEXT_BASE
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.globl lowlevel_init
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lowlevel_init:
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/* use iRAM stack in bl2 */
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ldr sp, =CONFIG_IRAM_STACK
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stmdb r13!, {ip,lr}
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/* check reset status */
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ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
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ldr r1, [r0]
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/* AFTR wakeup reset */
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ldr r2, =S5P_CHECK_DIDLE
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cmp r1, r2
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beq exit_wakeup
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/* LPA wakeup reset */
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ldr r2, =S5P_CHECK_LPA
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cmp r1, r2
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beq exit_wakeup
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/* Sleep wakeup reset */
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ldr r2, =S5P_CHECK_SLEEP
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cmp r1, r2
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beq wakeup_reset
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/*
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* If U-boot is already running in RAM, no need to relocate U-Boot.
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* Memory controller must be configured before relocating U-Boot
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* in ram.
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*/
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ldr r0, =0x0ffffff /* r0 <- Mask Bits*/
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bic r1, pc, r0 /* pc <- current addr of code */
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/* r1 <- unmasked bits of pc */
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ldr r2, _TEXT_BASE /* r2 <- original base addr in ram */
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bic r2, r2, r0 /* r2 <- unmasked bits of r2*/
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cmp r1, r2 /* compare r1, r2 */
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beq 1f /* r0 == r1 then skip sdram init */
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/* init system clock */
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bl system_clock_init
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/* Memory initialize */
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bl mem_ctrl_init
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1:
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bl tzpc_init
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ldmia r13!, {ip,pc}
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wakeup_reset:
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bl system_clock_init
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bl mem_ctrl_init
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bl tzpc_init
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exit_wakeup:
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/* Load return address and jump to kernel */
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ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)
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/* r1 = physical address of exynos5_cpu_resume function*/
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ldr r1, [r0]
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/* Jump to kernel */
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mov pc, r1
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nop
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nop
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