upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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58 lines
1.5 KiB
58 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2010-2018 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the virtual mx6memcal board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SPL */
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#include "mx6_common.h"
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#include "imx6_spl.h"
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#undef CONFIG_MMC
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#undef CONFIG_SPL_MMC_SUPPORT
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#undef CONFIG_GENERIC_MMC
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#undef CONFIG_CMD_FUSE
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x20000000
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#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
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#define CONFIG_MXC_UART
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#ifdef CONFIG_SERIAL_CONSOLE_UART1
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#if defined(CONFIG_MX6SL)
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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#else
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#endif
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#elif defined(CONFIG_SERIAL_CONSOLE_UART2)
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#else
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#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI
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#endif /* __CONFIG_H */
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