Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

hisilicon: hikey: Update instructions based on latest source

Browse Source 
Update the HiKey board instructions based on the latest source
available. These instructions are derived from the ATF platform doc.
While updating the instructions, some comments on ATF issue has been
removed since it is fixed in latest ATF source.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
lime2-spi
Manivannan Sadhasivam 6 years ago committed by Tom Rini
parent 26b068280f
commit a81f663ff7
1 changed files with 113 additions and 146 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 259
      board/hisilicon/hikey/README

259
board/hisilicon/hikey/README
Unescape View File

@ -10,11 +10,10 @@ HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has:
* 802.11a/b/g/n WiFi, Bluetooth * 802.11a/b/g/n WiFi, Bluetooth
The HiKey schematic can be found here: - The HiKey schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/96Boards-Hikey-Rev-A1.pdf https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf
A SoC datasheet can be found here: - The SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/ https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
Currently the u-boot port supports: - Currently the u-boot port supports: -
* USB * USB
@ -32,18 +31,20 @@ First get all the sources
> mkdir -p ~/hikey/src ~/hikey/bin > mkdir -p ~/hikey/src ~/hikey/bin
> cd ~/hikey/src > cd ~/hikey/src
> git clone https://github.com/96boards/edk2.git > git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5
> git clone https://github.com/96boards/arm-trusted-firmware.git > git clone https://github.com/ARM-software/arm-trusted-firmware
> git clone https://github.com/96boards/l-loader.git > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
> git clone https://github.com/96boards/burn-boot.git > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
> git clone https://github.com/96boards-hikey/atf-fastboot
> wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py
Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source. Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
The latest version can be obtained from the edk2 repo. The latest version can be obtained from the OpenPlatformPkg repo.
> cp edk2/HisiPkg/HiKeyPkg/NonFree/mcuimage.bin ~/hikey/bin/ > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/
Get nvme.img binary (check this link is still the latest) Get nvme.img binary
> wget -P ~/hikey/bin https://builds.96boards.org/releases/reference-platform/debian/hikey/16.03/bootloader/nvme.img > wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img
Compile U-Boot Compile U-Boot
============== ==============
@ -58,34 +59,45 @@ Compile ARM Trusted Firmware (ATF)
> cd ~/hikey/src/arm-trusted-firmware > cd ~/hikey/src/arm-trusted-firmware
> make CROSS_COMPILE=aarch64-linux-gnu- all fip \ > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
BL30=~/hikey/bin/mcuimage.bin \ SCP_BL2=~/hikey/bin/mcuimage.bin \
BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
Copy resulting binaries Copy the resulting FIP binary
> cp build/hikey/debug/bl1.bin ~/hikey/bin
> cp build/hikey/debug/fip.bin ~/hikey/bin > cp build/hikey/debug/fip.bin ~/hikey/bin
Compile ATF Fastboot
====================
> cd ~/hikey/src/atf-fastboot
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1
Compile l-loader Compile l-loader
=============== ================
> cd ~/hikey/src/l-loader > cd ~/hikey/src/l-loader
> make BL1=~/hikey/bin/bl1.bin all > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin
> ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin
> ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin
> make hikey PTABLE_LST=aosp-8g
Copy the resulting binaries
> cp *.img ~/hikey/bin > cp *.img ~/hikey/bin
> cp l-loader.bin ~/hikey/bin > cp l-loader.bin ~/hikey/bin
> cp recovery.bin ~/hikey/bin
These instructions are adapted from These instructions are adapted from
https://github.com/96boards/documentation/wiki/HiKeyUEFI https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst
FLASHING FLASHING
======== ========
1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with 1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
the hisi-idt.py utility. the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command.
The command below assumes HiKey enumerated as the first USB serial port The command below assumes HiKey enumerated as the first USB serial port
> sudo ~/hikey/src/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=~/hikey/bin/l-loader.bin
2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device by plugging a USB A to mini B > sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin
cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device.
> sudo fastboot devices > sudo fastboot devices
@ -93,51 +105,37 @@ The command below assumes HiKey enumerated as the first USB serial port
3. Flash the images 3. Flash the images
> sudo fastboot flash ptable ~/hikey/bin/ptable.img > sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img
> sudo fastboot flash loader ~/hikey/bin/l-loader.bin
> sudo fastboot flash fastboot ~/hikey/bin/fip.bin > sudo fastboot flash fastboot ~/hikey/bin/fip.bin
> sudo fastboot flash nvme ~/hikey/bin/nvme.img > sudo fastboot flash nvme ~/hikey/bin/nvme.img
4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) 4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the have ATF, booting u-boot from eMMC.
flashing twice in the past to avoid an ATF error.
Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
will get 'dwc_otg_core_host_init: Timeout!' errors. will get 'dwc_otg_core_host_init: Timeout!' errors.
See working boot trace below (by default trace is now output to UART3 not UART0 on latest See working boot trace below on UART3 available at Low Speed Expansion header: -
ATF, U-Boot and Kernel sources): -
debug EMMC boot: send RST_N . NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea
debug EMMC boot: start eMMC boot...... NOTICE: BL2: Built : 09:21:42, Aug 29 2018
load fastboot1! INFO: BL2: Doing platform setup
INFO: ddr3 rank1 init pass
Switch to aarch64 mode. CPU0 executes at 0xf9801000! INFO: succeed to set ddrc 150mhz
INFO: ddr3 rank1 init pass
INFO: BL1: 0xf9810000 - 0xf9817000 [size = 28672] INFO: succeed to set ddrc 266mhz
NOTICE: Booting Trusted Firmware
NOTICE: BL1: v1.1(debug):e8b7174
NOTICE: BL1: Built : 19:16:44, Sep 8 2015
INFO: BL1: RAM 0xf9810000 - 0xf9817000
NOTICE: syspll frequency:1190494208Hz
NOTICE: succeed to init lpddr3 rank0 dram phy
INFO: lpddr3_freq_init, set ddrc 533mhz
INFO: init ddr3 rank0
INFO: ddr3 rank1 init pass INFO: ddr3 rank1 init pass
INFO: lpddr3_freq_init, set ddrc 800mhz INFO: succeed to set ddrc 400mhz
INFO: init ddr3 rank0
INFO: ddr3 rank1 init pass INFO: ddr3 rank1 init pass
INFO: Elpida DDR INFO: succeed to set ddrc 533mhz
INFO: ddr3 rank1 init pass
INFO: succeed to set ddrc 800mhz
INFO: Samsung DDR
INFO: ddr test value:0xa5a55a5a INFO: ddr test value:0xa5a55a5a
INFO: Hisilicon HiKey platform is initialized INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
INFO: Using FIP INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000
INFO: Loading file 'bl2.bin' at address 0xf9818000
INFO: File 'bl2.bin' loaded: 0xf9818000 - 0xf9821100
NOTICE: BL1: Booting BL2
INFO: BL1: BL2 address = 0xf9818000
INFO: BL1: BL2 spsr = 0x3c5
INFO: [BDID] [fff91c18] midr: 0x410fd033 INFO: [BDID] [fff91c18] midr: 0x410fd033
INFO: [BDID] [fff91c1c] board type: 0
INFO: [BDID] [fff91c20] board id: 0x2b
INFO: init_acpu_dvfs: pmic version 17 INFO: init_acpu_dvfs: pmic version 17
INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00. INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
INFO: acpu_dvfs_volt_init: success! INFO: acpu_dvfs_volt_init: success!
@ -150,111 +148,80 @@ INFO: - 1: 0x49
INFO: - 2: 0x50 INFO: - 2: 0x50
INFO: - 3: 0x60 INFO: - 3: 0x60
INFO: - 4: 0x78 INFO: - 4: 0x78
NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):e8b7174 NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2
NOTICE: BL2: Built : 19:16:46, Sep 8 2015 INFO: Loading image id=2 at address 0x1000000
INFO: BL2: Loading BL3-0 INFO: Image id=2 loaded: 0x1000000 - 0x1023d00
INFO: Using FIP
INFO: Loading file 'bl30.bin' at address 0x1000000
INFO: Skip reserving memory: 0x1000000 - 0x1023270
INFO: File 'bl30.bin' loaded: 0x1000000 - 0x1023270
INFO: bl2_plat_handle_bl30: [1000000] 3a334d43 34313032 2f38302f 30203133
INFO: bl2_plat_handle_bl30: [10000c8] 0 0 b 0
INFO: bl2_plat_handle_bl30: [1000190] 17 0 0 0
INFO: bl2_plat_handle_bl30: [1023260] 0 0 0 0
INFO: hisi_mcu_load_image: mcu sections 0: INFO: hisi_mcu_load_image: mcu sections 0:
INFO: hisi_mcu_load_image: src = 0x1000200 INFO: hisi_mcu_load_image: src = 0x1000200
INFO: hisi_mcu_load_image: dst = 0xf6000000 INFO: hisi_mcu_load_image: dst = 0xf6000000
INFO: hisi_mcu_load_image: size = 512 INFO: hisi_mcu_load_image: size = 31184
INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71 INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689
INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x7600 0x201 0x1eae1 0x1ea71 INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
INFO: hisi_mcu_load_image: mcu sections 1: INFO: hisi_mcu_load_image: mcu sections 1:
INFO: hisi_mcu_load_image: src = 0x1000400 INFO: hisi_mcu_load_image: src = 0x1007bd0
INFO: hisi_mcu_load_image: dst = 0xf6000200 INFO: hisi_mcu_load_image: dst = 0x5e00000
INFO: hisi_mcu_load_image: size = 27828 INFO: hisi_mcu_load_image: size = 93828
INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915 INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
INFO: hisi_mcu_load_image: [DST 0xf6000200] 0xbf00bf00 0x4815b672 0x48154780 0x60014915 INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
INFO: hisi_mcu_load_image: mcu sections 2: INFO: hisi_mcu_load_image: mcu sections 2:
INFO: hisi_mcu_load_image: src = 0x10070b4 INFO: hisi_mcu_load_image: src = 0x101ea54
INFO: hisi_mcu_load_image: dst = 0xf6007200 INFO: hisi_mcu_load_image: dst = 0x5e16e84
INFO: hisi_mcu_load_image: size = 1024 INFO: hisi_mcu_load_image: size = 15428
INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0 INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180
INFO: hisi_mcu_load_image: [DST 0xf6007200] 0x55 0x0 0x0 0x0 INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
INFO: hisi_mcu_load_image: mcu sections 3: INFO: hisi_mcu_load_image: mcu sections 3:
INFO: hisi_mcu_load_image: src = 0x10074b4 INFO: hisi_mcu_load_image: src = 0x1022698
INFO: hisi_mcu_load_image: dst = 0xfff8e000 INFO: hisi_mcu_load_image: dst = 0x5e22a10
INFO: hisi_mcu_load_image: size = 12704
INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0
INFO: hisi_mcu_load_image: [DST 0xfff8e000] 0x55 0x0 0x0 0x0
INFO: hisi_mcu_load_image: mcu sections 4:
INFO: hisi_mcu_load_image: src = 0x100a654
INFO: hisi_mcu_load_image: dst = 0x5e00000
INFO: hisi_mcu_load_image: size = 82912
INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
INFO: hisi_mcu_load_image: [DST 0x5e00000] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
INFO: hisi_mcu_load_image: mcu sections 5:
INFO: hisi_mcu_load_image: src = 0x101ea34
INFO: hisi_mcu_load_image: dst = 0x5e143e0
INFO: hisi_mcu_load_image: size = 12816
INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443
INFO: hisi_mcu_load_image: [DST 0x5e143e0] 0x33323130 0x37363534 0x42413938 0x46454443
INFO: hisi_mcu_load_image: mcu sections 6:
INFO: hisi_mcu_load_image: src = 0x1021c44
INFO: hisi_mcu_load_image: dst = 0x5e1c1d0
INFO: hisi_mcu_load_image: size = 3060 INFO: hisi_mcu_load_image: size = 3060
INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0 INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0
INFO: hisi_mcu_load_image: [DST 0x5e1c1d0] 0x0 0x0 0x0 0x0 INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0
INFO: hisi_mcu_load_image: mcu sections 7: INFO: hisi_mcu_load_image: mcu sections 4:
INFO: hisi_mcu_load_image: src = 0x1022838 INFO: hisi_mcu_load_image: src = 0x102328c
INFO: hisi_mcu_load_image: dst = 0x5e1cdc4 INFO: hisi_mcu_load_image: dst = 0x5e23604
INFO: hisi_mcu_load_image: size = 2616 INFO: hisi_mcu_load_image: size = 2616
INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0 INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0
INFO: hisi_mcu_load_image: [DST 0x5e1cdc4] 0xf80000a0 0x0 0xf80000ac 0x0 INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0 INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
INFO: bl2_plat_handle_bl30: mcu pc is 42933301 INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301
INFO: bl2_plat_handle_bl30: AO_SC_PERIPH_CLKSTAT4 is 39018f09 INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09
INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000 WARNING: BL2: Platform setup already done!!
INFO: BL2: Loading BL3-1 INFO: BL2: Loading image id 3
INFO: Using FIP INFO: Loading image id=3 at address 0xf9858000
INFO: Loading file 'bl31.bin' at address 0xf9858000 INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058
INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9861010 INFO: BL2: Loading image id 5
INFO: BL2: Loading BL3-2 INFO: Loading image id=5 at address 0x35000000
INFO: Using FIP INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2
WARNING: Failed to access image 'bl32.bin' (-1) NOTICE: BL2: Booting BL31
WARNING: Failed to load BL3-2 (-1) INFO: Entry point address = 0xf9858000
INFO: BL2: Loading BL3-3 INFO: SPSR = 0x3cd
INFO: Using FIP NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea
INFO: Loading file 'bl33.bin' at address 0x35000000 NOTICE: BL31: Built : 09:21:44, Aug 29 2018
INFO: File 'bl33.bin' loaded: 0x35000000 - 0x3504c468 WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t
NOTICE: BL1: Booting BL3-1 WARNING: Please migrate to using an interrupt_prop_t array
INFO: BL1: BL3-1 address = 0xf9858000 INFO: ARM GICv2 driver initialized
INFO: BL1: BL3-1 spsr = 0x3cd INFO: BL31: Initializing runtime services
INFO: BL1: BL3-1 params address = 0xf9821920 INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
INFO: BL1: BL3-1 plat params address = 0x0 INFO: BL31: cortex_a53: CPU workaround for 843419 was applied
NOTICE: BL3-1: v1.1(debug):e8b7174 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
NOTICE: BL3-1: Built : 19:16:49, Sep 8 2015 INFO: BL31: Preparing for EL3 exit to normal world
INFO: BL3-1: Initializing runtime services INFO: Entry point address = 0x35000000
INFO: BL3-1: Preparing for EL3 exit to normal world INFO: SPSR = 0x3c9
INFO: BL3-1: Next image address = 0x35000000
INFO: BL3-1: Next image spsr = 0x3c9
U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey
U-Boot 2015.10-rc2 (Sep 08 2015 - 20:29:33 +0100)hikey
DRAM: 990 MiB
DRAM: 1008 MiB
HI6553 PMIC init HI6553 PMIC init
MMC: config_sd_carddetect: SD card not present MMC: config_sd_carddetect: SD card present
HiKey DWMMC: 0, HiKey DWMMC: 1 Hisilicon DWMMC: 0, Hisilicon DWMMC: 1
Card did not respond to voltage select! Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5)
** Bad device mmc 1 ** In: uart@f7113000
Using default environment Out: uart@f7113000
Err: uart@f7113000
In: serial
Out: serial
Err: serial
Net: Net Initialization Skipped Net: Net Initialization Skipped
No ethernet found. No ethernet found.
Hit any key to stop autoboot: 0 Hit any key to stop autoboot: 0
starting USB... starting USB...
USB0: Core Release: 3.00a USB0: scanning bus 0 for devices... 2 USB Device(s) found
scanning bus 0 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found scanning usb for storage devices... 0 Storage Device(s) found
scanning usb for ethernet devices... 0 Ethernet Device(s) found scanning usb for ethernet devices... 0 Ethernet Device(s) found

Write Preview
Loading…
Cancel
Save