First step for a cleanup of all header files for km8321 boards.
Signed-off-by: Thomas Reufer <thomas.reufer@keymile.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
The mgcoge2 board from keymile deploys two different processors.
An ARM based Kirkwood for the "unit" part of the SW and a PPC for
the "ne" part of the SW. Therefore in Linux and U-Boot the names
for the board are mgcoge2un and mgcoge2ne. This patch adds the
mgcoge2ne part of the board. The ppc part of mgboge2 is quite
similar to mgcoge, therefore a generic header km82xx-common.h
was introduced to collect all similiarities. Currently the only
difference is that mgcoge2ne has a 64 MB numonyx NOR flash with
a single die. The mgcoge has a dual die flash 2*32MB from spansion.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
The Kirwood based SUEN8 board from Keymile is at this stage
the same than the suen3 board. This patch adds the board
support for the suen8.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.
Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
This board is similar to suvd3 board. So most initialisation topics
are taken from suvd3 (UART1, Ethernet, piggy PHY, flash, ram) only the
application specific chip selects differ.
Signed-off-by: Lukas Roggli <lukas.roggli@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
- serial console on UART1
- Ethernet RMII over UCC4
- PHY SMSC LAN8700
- 64MB Flash
- 128 MB DDR2 RAM
- I2C
- bootcount
This board is similiar to the kmeter1 (8360) board,
so common config options are extracted into the
include/configs/km83xx-common.h file.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
This patch reworks all headerfiles for keymile boards. Furthermore
the environment variables are refactored.
Changes:
- introduce km-powerpc.h file and extract ppc specific parts to it
- move ARM specific options and vaiables to km_arm.h
- sort the environment variables to logical groups
- enhance the description of the environment variables
- remove KM specific HW key and board id from kernel command line
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
- adapt copyright string
- change bootdelay to 2 seconds
- set max number of command args to 32
- set I/O buffer size to 512
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
- use I/O accessors
-> For accessing the FPGA therefore a struct km_bec_fpga
is introduced.
- no longer externs needed
- to defines, that only select functions, don;t assign a
numeric value
- Codingstyle changes to prevent checkpatch errors/warnings
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
The MACH_TYPE SUEN3 is now to specific for keymile boards, because
other boards similar to suen3 will follow. So the MACH_SUEN3 was renamed
to MACH_KM_KIRKWOOD.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
CONFIG_SYS_BOOTMAPSZ has been 64M on these boards for some time so we
should also allow the kernel image to be up to 64M decompressed. This
also matches what we pass to the OS based on the ePAPR specification.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Also added support to save env to spi flash in case of SPIBOOT.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The tsec driver was defining the default MDIO address as
the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first
TSEC's registers are separated from the MDIO registers. Use
the existing MDIO_BASE_ADDR, instead.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need
to be set to ABORT, otherwise, next read command will hang.
This is a software Software Restrictions in i.MX53 reference manual:
29.7.8 Multi-block Read
For pre-defined multi-block read operation, that is,the number of blocks
to read has been defined by previous CMD23 for MMC, or pre-defined number
of blocks in CMD53 for SDIO/SDCombo,or whatever multi-block read without
abort command at card side, an abort command, either automatic or manual
CMD12/CMD52, is still required by ESDHC after the pre-defined number of
blocks are done, to drive the internal state machine to idle mode. In this
case, the card may not respond to this extra abort command and ESDHC will
get Response Timeout. It is recommended to manually send an abort command
with RSPTYP[1:0] both bits cleared.
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.
Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.
Initialize b_max to 0 in all callers to mmc_register.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
As Andy Fleming suggested, we can call mmc_init() in mmc_spi command.
So that we don't need to run mmcinfo command next.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Add support for the ARM PrimeCell MultiMedia Interface - PL180.
Ported from original device driver written by ST-Ericsson.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
Introduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because
different SoCs have different divisor amounts. All the PQ3 parts are
/8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Bank powerdown through RCW[SRDS_LPD_Bn] for XAUI on FM2 and SGMII on FM1
are swapped.
Erratum SERDES-A001 says that if bank two is kept disabled and after bank
three is enabled, then the PLL for bank three won't lock properly. The
work-around is to enable and then disable bank two after bank three is
enabled.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Part of the SERDES9 erratum work-around is to set some bits in the SerDes
TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA. The
current code does this only for XAUI, so extend it to the other protocols.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The work-around for P4080 erratum SERDES-8 requires all lanes of banks two
and three to be disabled (powered down) in the RCW. Display a warning
message if this is not the case.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
SerDes PLL bandwidth default setting is incorrect when no lanes are
configured as PCI Express.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add the 'pixis_reset dump' command, which displays the contents of the PIXIS
registers. This command is only available if DEBUG is defined.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove an empty board_early_init_f() from the MPC8641HPCN board.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the 'video-mode' environment variable (for Freescale chips that have a
DIU display controller) to designate the full video configuration. Previously,
the DIU driver used the 'monitor' variable, and it was used only to determine
the output video port.
The old definition of the "monitor" environment variable only determines
which video port to use for output. This variable was set to a number (0,
1, or sometimes 2) to specify a DVI, LVDS, or Dual-LVDS port. The
resolution was hard-coded into board-specific code. The Linux command-line
arguments needed to be hard-coded to the proper video definition string.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add function video_get_video_mode(), which parses the "video-mode" environment
variable and returns each of its components. The format matches the video=
command-line option used for Linux:
video-mode=<driver>:<xres>x<yres>-<depth>@<freq><,option=string>
<driver> The video driver, ignored by U-Boot
<xres> The X resolution (in pixels) to use.
<yres> The Y resolution (in pixels) to use.
<depth> The color depth (in bits) to use.
<freq> The frequency (in Hz) to use.
<options> A comma-separated list of device-specific options
Signed-off-by: Timur Tabi <timur@freescale.com>
There seems to be tools producing incorrect 'end of bitmap data'
markers '0100' in a RLE bitmap. Drawing such bitmaps can result
in overwriting memory above the frame buffer. E.g. on MPC5121e
based boards this memory can contain U-Boot environment.
We may not rely on the correct end of bitmap data marker 0001
only, but also have to check whether we are going to draw a
valid frame buffer scan line.
The patch provides a fix by maintaining a pixel counter
which is incremented by the amount of pixels we are going
to draw. If the counter exceeds frame buffer pixels limit
we stop the drawing with the error message.
Reported-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
The following boards gain device tree support with this patch:
ca9x4_ct_vxp - Versatile Express
i.mx5 boards:
efikamx
mx51evk
mx53evk
OMAP boards:
devkit8000
igep0020
igep0030
omap3_overo
omap3_pandora
omap4_sdp3430
omap3_zoom1
omap3_zoom2
omap4_panda
omap4_sdp4430
Tegra boards:
Harmony
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Deblock i2c bus when switching to another i2c bus, if using
i2c_set_bus_num().
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
To make sure that the mux can be configured a deblocking sequence
is done before the mux configuration. After the mux switch the new leaf
of, the i2c tree must be again deblocked.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Detlev Zundel <dzu@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
A lot of boards set FT_FSL_PCI_SETUP directly in their board code
and don't check to see if CONFIG_PCI is actually defined. This
will cause the board compilation to fail if CONFIG_PCI is not
defined. The p1022ds board is one such example.
Instead of fixing every board this patch wraps FT_FSL_PCI_SETUP
around CONFIG_PCI so we can remove CONFIG_PCI and boards will
still build properly.
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
versioned SEC properties changed names during development, so
for now search and update LIODNs for both "secX.Y" and
"sec-vX.Y" based properties.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The workaround for ESDHC111 should also be applied on
P2040/P3041/P5010/P5020 SoCs.
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P2040, P3041, P5010, and P5020 all have internal USB PHYs that we
need to enable for them to function.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P3041DS & P5020DS boards are almost identical (except for the
processor in them). Additionally they are based on the P4080DS board
design so we use the some board code for all 3 boards.
Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have
meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock
configuration.
Additionally, the P3041DS/P5020DS support NAND.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rework and add some new APIs to the fsl_corenet_serdes code for use by
erratum and drivers.
* Rename serdes_get_bank() to serdes_get_bank_by_lane()
* Add serdes_get_first_lane returns which SERDES lane is used by device
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Thomas Reufer
Heiko Schocher
Holger Brunck
Wolfgang Denk
Kyle Moffett
Kumar Gala
Jiang Yutang
Priyanka Jain
Jerry Huang
Mingkai Hu
Andy Fleming
Thomas Chou
Jason Liu
John Rigby
Matt Waddel
Timur Tabi
Anatolij Gustschin
Grant Likely
Stefan Bigler
Po-Yu Chuang
Matthew McClintock
Kim Phillips
Lei Xu
Roy Zang
Emil Medve