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sunxi: prepare for sharing MACH_SUN8I_H3 config symbol

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The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
To allow sharing the clocks, GPIO and driver code easily, create an
architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol.
Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and
let it be selected by a new shared Kconfig option.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
master
Andre Przywara 8 years ago committed by Jagan Teki
parent 170817a497
commit 7b82a229e5
12 changed files with 26 additions and 22 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 4
      arch/arm/include/asm/arch-sunxi/clock_sun6i.h
  2. 4
      arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
  3. 2
      arch/arm/include/asm/arch-sunxi/dram.h
  4. 2
      arch/arm/mach-sunxi/Makefile
  5. 2
      arch/arm/mach-sunxi/board.c
  6. 6
      arch/arm/mach-sunxi/clock_sun6i.c
  7. 4
      arch/arm/mach-sunxi/usb_phy.c
  8. 14
      board/sunxi/Kconfig
  9. 2
      drivers/mtd/spi/Kconfig
  10. 2
      drivers/net/sun8i_emac.c
  11. 4
      drivers/power/Kconfig
  12. 2
      drivers/usb/host/ehci-sunxi.c

4
arch/arm/include/asm/arch-sunxi/clock_sun6i.h
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@ -242,7 +242,7 @@ struct sunxi_ccm_reg {
/* ahb_gate0 offsets */ /* ahb_gate0 offsets */
#define AHB_GATE_OFFSET_USB_OHCI1 30 #define AHB_GATE_OFFSET_USB_OHCI1 30
#define AHB_GATE_OFFSET_USB_OHCI0 29 #define AHB_GATE_OFFSET_USB_OHCI0 29
#ifdef CONFIG_MACH_SUN8I_H3 #ifdef CONFIG_MACH_SUNXI_H3_H5
/* /*
* These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call * These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call
* them 0 - 2 like they were called on older SoCs. * them 0 - 2 like they were called on older SoCs.
@ -293,7 +293,7 @@ struct sunxi_ccm_reg {
#define CCM_USB_CTRL_PHY1_CLK (0x1 << 9) #define CCM_USB_CTRL_PHY1_CLK (0x1 << 9)
#define CCM_USB_CTRL_PHY2_CLK (0x1 << 10) #define CCM_USB_CTRL_PHY2_CLK (0x1 << 10)
#define CCM_USB_CTRL_PHY3_CLK (0x1 << 11) #define CCM_USB_CTRL_PHY3_CLK (0x1 << 11)
#ifdef CONFIG_MACH_SUN8I_H3 #ifdef CONFIG_MACH_SUNXI_H3_H5
/* /*
* These are OHCI1 - OHCI3 in the datasheet (OHCI0 is for the OTG) we call * These are OHCI1 - OHCI3 in the datasheet (OHCI0 is for the OTG) we call
* them 0 - 2 like they were called on older SoCs. * them 0 - 2 like they were called on older SoCs.

4
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
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@ -56,7 +56,7 @@
#define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB2_BASE 0x01c1c000
#endif #endif
#ifdef CONFIG_SUNXI_GEN_SUN6I #ifdef CONFIG_SUNXI_GEN_SUN6I
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_USBPHY_BASE 0x01c19000 #define SUNXI_USBPHY_BASE 0x01c19000
#define SUNXI_USB0_BASE 0x01c1a000 #define SUNXI_USB0_BASE 0x01c1a000
#define SUNXI_USB1_BASE 0x01c1b000 #define SUNXI_USB1_BASE 0x01c1b000
@ -94,7 +94,7 @@
#define SUNXI_KEYPAD_BASE 0x01c23000 #define SUNXI_KEYPAD_BASE 0x01c23000
#define SUNXI_TZPC_BASE 0x01c23400 #define SUNXI_TZPC_BASE 0x01c23400
#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3) || \ #if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUNXI_H3_H5) || \
defined(CONFIG_MACH_SUN50I) defined(CONFIG_MACH_SUN50I)
/* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */ /* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
#define SUNXI_SIDC_BASE 0x01c14000 #define SUNXI_SIDC_BASE 0x01c14000

2
arch/arm/include/asm/arch-sunxi/dram.h
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@ -24,7 +24,7 @@
#include <asm/arch/dram_sun8i_a33.h> #include <asm/arch/dram_sun8i_a33.h>
#elif defined(CONFIG_MACH_SUN8I_A83T) #elif defined(CONFIG_MACH_SUN8I_A83T)
#include <asm/arch/dram_sun8i_a83t.h> #include <asm/arch/dram_sun8i_a83t.h>
#elif defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) #elif defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#include <asm/arch/dram_sun8i_h3.h> #include <asm/arch/dram_sun8i_h3.h>
#elif defined(CONFIG_MACH_SUN9I) #elif defined(CONFIG_MACH_SUN9I)
#include <asm/arch/dram_sun9i.h> #include <asm/arch/dram_sun9i.h>

2
arch/arm/mach-sunxi/Makefile
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@ -48,7 +48,7 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o
obj-$(CONFIG_MACH_SUN8I_H3) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUNXI_H3_H5) += dram_sun8i_h3.o
obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o
obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o
endif endif

2
arch/arm/mach-sunxi/board.c
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@ -98,7 +98,7 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_A33_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_A33_GPB_UART0);
sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_H3) #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNXI_H3_H5)
sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0);
sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP);

6
arch/arm/mach-sunxi/clock_sun6i.c
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@ -22,7 +22,7 @@ void clock_init_safe(void)
struct sunxi_ccm_reg * const ccm = struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE; (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
#if !defined(CONFIG_MACH_SUN8I_H3) && !defined(CONFIG_MACH_SUN50I) #if !defined(CONFIG_MACH_SUNXI_H3_H5) && !defined(CONFIG_MACH_SUN50I)
struct sunxi_prcm_reg * const prcm = struct sunxi_prcm_reg * const prcm =
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
@ -51,7 +51,7 @@ void clock_init_safe(void)
void clock_init_sec(void) void clock_init_sec(void)
{ {
#ifdef CONFIG_MACH_SUN8I_H3 #ifdef CONFIG_MACH_SUNXI_H3_H5
struct sunxi_ccm_reg * const ccm = struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE; (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
@ -152,7 +152,7 @@ void clock_set_pll5(unsigned int clk, bool sigma_delta_enable)
const int max_n = 32; const int max_n = 32;
int k = 1, m = 2; int k = 1, m = 2;
#ifdef CONFIG_MACH_SUN8I_H3 #ifdef CONFIG_MACH_SUNXI_H3_H5
clrsetbits_le32(&ccm->pll5_tuning_cfg, CCM_PLL5_TUN_LOCK_TIME_MASK | clrsetbits_le32(&ccm->pll5_tuning_cfg, CCM_PLL5_TUN_LOCK_TIME_MASK |
CCM_PLL5_TUN_INIT_FREQ_MASK, CCM_PLL5_TUN_INIT_FREQ_MASK,
CCM_PLL5_TUN_LOCK_TIME(2) | CCM_PLL5_TUN_INIT_FREQ(16)); CCM_PLL5_TUN_LOCK_TIME(2) | CCM_PLL5_TUN_INIT_FREQ(16));

4
arch/arm/mach-sunxi/usb_phy.c
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@ -146,10 +146,10 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
} }
} }
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
{ {
#if defined CONFIG_MACH_SUN8I_H3 #if defined CONFIG_MACH_SUNXI_H3_H5
if (phy->id == 0) if (phy->id == 0)
clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01); clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
#endif #endif

14
board/sunxi/Kconfig
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@ -54,6 +54,11 @@ config SUNXI_GEN_SUN6I
watchdog, etc. watchdog, etc.
config MACH_SUNXI_H3_H5
bool
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
choice choice
prompt "Sunxi SoC Variant" prompt "Sunxi SoC Variant"
optional optional
@ -124,8 +129,7 @@ config MACH_SUN8I_H3
select CPU_V7_HAS_NONSEC select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I select MACH_SUNXI_H3_H5
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN9I config MACH_SUN9I
@ -147,7 +151,7 @@ endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33" # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
config MACH_SUN8I config MACH_SUN8I
bool bool
default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUNXI_H3_H5 || MACH_SUN8I_A83T
config RESERVE_ALLWINNER_BOOT0_HEADER config RESERVE_ALLWINNER_BOOT0_HEADER
bool "reserve space for Allwinner boot0 header" bool "reserve space for Allwinner boot0 header"
@ -335,7 +339,7 @@ config OLD_SUNXI_KERNEL_COMPAT
config MMC0_CD_PIN config MMC0_CD_PIN
string "Card detect pin for mmc0" string "Card detect pin for mmc0"
default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
default "" default ""
---help--- ---help---
Set the card detect pin for mmc0, leave empty to not use cd. This Set the card detect pin for mmc0, leave empty to not use cd. This
@ -500,7 +504,7 @@ config AXP_GPIO
config VIDEO config VIDEO
bool "Enable graphical uboot console on HDMI, LCD or VGA" bool "Enable graphical uboot console on HDMI, LCD or VGA"
depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I depends on !MACH_SUN8I_A83T && !MACH_SUNXI_H3_H5 && !MACH_SUN9I && !MACH_SUN50I
default y default y
---help--- ---help---
Say Y here to add support for using a cfb console on the HDMI, LCD Say Y here to add support for using a cfb console on the HDMI, LCD

2
drivers/mtd/spi/Kconfig
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@ -132,7 +132,7 @@ if SPL
config SPL_SPI_SUNXI config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL" bool "Support for SPI Flash on Allwinner SoCs in SPL"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_H3 || MACH_SUN50I depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
---help--- ---help---
Enable support for SPI Flash. This option allows SPL to read from Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does sunxi SPI Flash. It uses the same method as the boot ROM, so does

2
drivers/net/sun8i_emac.c
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@ -62,7 +62,7 @@
#define AHB_GATE_OFFSET_EPHY 0 #define AHB_GATE_OFFSET_EPHY 0
#if defined(CONFIG_MACH_SUN8I_H3) #if defined(CONFIG_MACH_SUNXI_H3_H5)
#define SUN8I_GPD8_GMAC 2 #define SUN8I_GPD8_GMAC 2
#else #else
#define SUN8I_GPD8_GMAC 4 #define SUN8I_GPD8_GMAC 4

4
drivers/power/Kconfig
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@ -12,7 +12,7 @@ choice
default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33
default AXP818_POWER if MACH_SUN8I_A83T default AXP818_POWER if MACH_SUN8I_A83T
default SUNXI_NO_PMIC if MACH_SUN8I_H3 || MACH_SUN50I default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I
config SUNXI_NO_PMIC config SUNXI_NO_PMIC
bool "board without a pmic" bool "board without a pmic"
@ -60,7 +60,7 @@ config AXP818_POWER
config SY8106A_POWER config SY8106A_POWER
bool "SY8106A pmic support" bool "SY8106A pmic support"
depends on MACH_SUN8I_H3 depends on MACH_SUNXI_H3_H5
---help--- ---help---
Select this to enable support for the SY8106A pmic found on some Select this to enable support for the SY8106A pmic found on some
H3 boards. H3 boards.

2
drivers/usb/host/ehci-sunxi.c
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@ -45,7 +45,7 @@ static int ehci_usb_probe(struct udevice *dev)
* clocks resp. phys. * clocks resp. phys.
*/ */
priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
#endif #endif
priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST; priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;

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