Use the new gclk helper functions to set up the PHY clock instead of
accessing the PM registers directly.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
- Separate the portmux configuration functionality from the GPIO pin
control API.
- Separate the controller-specific code from the chip-specific code.
- Allow "ganged" port configuration (multiple pins at once).
- Add more flexibility to the "canned" peripheral select functions:
- Allow using more than 23 address bits, more chip selects, as
well as NAND- and CF-specific pins.
- Make the MACB SPEED pin optional, and choose between MII/RMII
using a parameter instead of an #ifdef.
- Make it possible to use other MMC slots than slot 0, and support
different MMC/SDCard data bus widths.
- Use more reasonable pull-up defaults; floating pins may consume a
lot of power.
- Get rid of some custom portmux code from the mimc200 board code. The
old gpio/portmux API couldn't really handle its requirements, but
the new one can.
- Add documentation.
The end result is slightly smaller code for all boards. Which isn't
really the point, but at least it isn't any larger.
This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
the board maintainers could help me test this on their boards. In
particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
can help me out.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Mark Jackson <mpfj@mimc.co.uk>
Cc: Alex Raimondi <alex.raimondi@miromico.ch>
Cc: Julien May <julien.may@miromico.ch>
Changes since v1:
* Enable pullup on NWAIT
* Add missing include to portmux-pio.h
* Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This adds initial support for the RTE RSK+ SH7203 board.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.
This patch supports the following functions:
- 128MB DDR2-SDRAM (29-bit address mode only)
- NOR Flash
- USB host
- Ethernet
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
- memsetup.s is changed/merged to lowlevel_init.S
memsetup.S has a global label memsetup that just returns back to caller
- memsetup global label is changed/merged to lowlevel_init
This label is not called from anywhere.
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
ARM DaVinci: Standardize names of directories/files.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The only board using this driver is the SL8245 board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added board_eth_init() function to bf537-stamp board.
Removed initialization for the Blackin EMAC driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
space such that 0xFA000000 in the processor's address space maps to 0
on the PCI I/O bus.
Signed-off-by Randy Vinson <rvinson@mvista.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
fix mvBL-M7 config and move to matrix_vision subdir
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
fix build warnings @ mvBC-P board by using correct types, i.e. change
out_be32 to out_be16 and out_8 accordingly.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra
8MByte FLASH and 128KByte FRAM.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache. All callers of invalidate_l1_instruction_cache()
call icache_disable() right after. Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.
Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Incorrect CFG_HZ value, change 1000000 to 1000.
Rename #waring to #warning. RAMBAR1 uses twice
in start.S, rename the later to FLASHBAR. Insert
nop for DRAM setup. And, env_offset in linker file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Haavard Skinnemoen
Nobuhiro Iwamatsu
Jean-Christophe PLAGNIOL-VILLARD
Guennadi Liakhovetski
Gururaja Hebbar K R
Hugo Villeneuve
John Rigby
TsiChung Liew
Heiko Schocher
Kumar Gala
Jon Loeliger
Ben Warren
Andre Schwarz
Randy Vinson
Ira W. Snyder
Mark Jackson