This change does the following:
- Removes the printing of the PCI interrupt line value. This is
normally set to 0 by U-Boot on bootup and is rarely used during
everyday operation.
- Prints out the PCI function number of a device. Previously a device
with multiple functions would be printed identically 2 times, which is
generally confusing. For example, on an Intel 2 port gigabit Ethernet
card the following was displayed:
...
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
...
- Prints a text description of each device's PCI class instead of the
raw PCI class code. The textual description makes it much easier to
determine what devices are installed on a PCI bus.
- Changes the general formatting of the PCI device output.
Previous output:
PCIE1: connected as Root Complex
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
03 00 10b5 8112 0604 00
02 01 10b5 8518 0604 00
02 02 10b5 8518 0604 00
08 00 1957 0040 0b20 00
07 00 10b5 8518 0604 00
09 00 10b5 8112 0604 00
07 01 10b5 8518 0604 00
07 02 10b5 8518 0604 00
06 00 10b5 8518 0604 00
02 03 10b5 8518 0604 00
01 00 10b5 8518 0604 00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d 00 1957 0040 0b20 00
PCIE2: Bus 0c - 0d
Updated output:
PCIE1: connected as Root Complex
04:01.0 - 8086:1010 - Network controller
04:01.1 - 8086:1010 - Network controller
03:00.0 - 10b5:8112 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
02:02.0 - 10b5:8518 - Bridge device
08:00.0 - 1957:0040 - Processor
07:00.0 - 10b5:8518 - Bridge device
09:00.0 - 10b5:8112 - Bridge device
07:01.0 - 10b5:8518 - Bridge device
07:02.0 - 10b5:8518 - Bridge device
06:00.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
01:00.0 - 10b5:8518 - Bridge device
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d:00.0 - 1957:0040 - Processor
PCIE2: Bus 0c - 0d
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
We appear to have different refclk's on the different corenet DS boards
so move the define out of the common header.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_TEXT_BASE setting is common across the 'corenet_ds' board
family so move it out of P4080DS.h and into corenet_ds.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
SQW/INT pin in RTC can be used for generating square wave(by default) or
as interrupt line. U-boot is registering this pin for interrupts.
Configuring SQW/INT bit as interrupt line during board initialization
to avoid spurious interrupts generated by square wave.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Introduce a SPL specific CONFIG_SYS_TEXT_BASE_SPL define to be used by
the linker. This has similiar semantics to CONFIG_SYS_TEXT_BASE however
since SPL is a unqiue image we introduce a new variable to control its
text base address.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For ARM systems, before ELF relocation was introduced,
CONFIG_SKIP_RELOCATE_UBOOT coul be used to prevent *COPYING* the
U-Boot image from whereever it was loaded to it's link address
(CONFIG_SYS_TEXT_BASE). The name was badly chosen, as no relocation
was performed at all, it was just a memcpy().
With ELF relocation, this does not work like that any more, and
related boards need to be fixed anyway. So don't keep this relict any
longer.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
When this define was introduced, the idea was to provide a soft
migration path for ARM boards to get adapted to the new relocation
support. However, other recent changes led to a different
implementation (ELF relocation), where this no longer works. By now
CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it
actually hurts because it obfuscates the actual code by sprinkling it
with lots of dead and non-working debris.
So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
After moving the definition of CONFIG_SYS_TEXT_BASE to the respective
board config files, all Marvell kirkwood board have just a single and
common entry in their config.mk files:
KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
Replace the only reference to KWD_CONFIG in the top level Makefile by
an equivalent setting, and remove all kirkwood config.mk files.
Signed-off-by: Wolfgang Denk <wd at denx.de>
Cc: Prafulla Wadaskar <prafulla at marvell.com>
Cc: Siddarth Gore <gores at marvell.com>
Cc: Simon Kagstrom <simon.kagstrom at netinsight.net>
Cc: Heiko Schocher <hs at denx.de>
Cc: Eric Cooper <ecc at cmu.edu>
Acked-by: Wolfgang Denk <wd at denx.de>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Current default options increase u-boot size to overlap the location of the environment in NAND, move environment higher up
Signed-off-by: Gray Remlin <g_remlin@rocketmail.com>
This patch is to fix build breakage and support new relocation
scheme for mx51evk.
- Correct IRAM base address and add size definition
The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
0x1FFE8000 which is for older revision.
- Include imx-regs.h in mx51evk.h
Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
referred to.
- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
They are used to define init RAM layout.
- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
buried by Wolfgang's commit below
25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
This patch is to consolidate default mx51evk env for two primary
boot modes, mmcboot and netboot.
It also cleans some unused env like netdev, uboot and redundant
env like loadaddr since CONFIG_LOADADDR already defines it.
Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
The mx51evk u-boot has an issue that system will get reset
every 2 hours.
MC13892 has an inside charge timer which expires in 120 minutes.
If ICHRG and CHGAUTOB are not set properly, this timer expiration
will get system power recycled.
Since mx51evk has no Li-Ion battery on board, the patch sets
ICHRG in externally powered mode and sets CHGAUTOB bit to avoid
automatic charging, so that system will not get reset by this
timer expiration.
The patch also corrects the bit field definition of register 48
(Charger 0) per latest MC13892 Reference Manual.
Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
now unnecessary config.mk file.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
being able to use "sizeof(struct global_data)" in assembler files.
Recent experience has shown that manual synchronization is not
reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into
GENERATED_GBL_DATA_SIZE which gets automatically generated by the
asm-offsets tool. In the result, all definitions of this value can be
deleted from the board config files. We have to make sure that all
files that reference such data include the new <asm-offsets.h> file.
No other changes have been done yet, but it is obvious that similar
changes / simplifications can be done for other, related macro
definitions as well.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
A recurrent issue is that certain C level constructs like sizeof() or
offsetof() cannot be used in assembler files, which is inconvenient
when such constructs are used in the definition of macro names etc.
To avoid duplication of such definitions (and thus another cause of
problems), we adapt the Linux way to automatically generate the
respective definitions from the respective C header files.
In Linux, this is implemented in include/linux/kbuild.h, Kbuild, and
arch/*/kernel/asm-offsets.c; we adapt the code from the Linux v2.6.36
kernel tree.
We also copy the concept of the include/generated/ directory which can
be used to hold other automatically generated files as well.
We start with an architecture-independent lib/asm-offsets.c which
generates include/generated/generic-asm-offsets.h (included by
include/asm-offsets.h, which is what will be referred to in the actual
source code). Later this may be extended by architecture-specific
arch/*/lib/asm-offsets.c files that will generate a
include/generated/asm-offsets.h.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
some end address; to make the meaning more clear we rename it into
CONFIG_SYS_INIT_RAM_SIZE
No other code changes are performed in this patch, only minor editing
of white space (due to the changed length) and the comments was done,
where noticed.
Note that the code for the PATI and cmi_mpc5xx board configurations
looks seriously broken. Last known maintainers on Cc:
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Board support for the Guntermann & Drunck CATCenter Io.
Board support for the Guntermann & Drunck IoCon.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
SICRH has been misconfigured, i.e. TSEC2 clock + D[0:3] are GPIOs.
Fix this to be RGMII signals again.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
This patch adds CONFIG_SYS_FLASH_BANKS_SIZES define to make use of new
cfi_flash driver ability to detect flash chips that are bigger than a
corresponding address window (we have such situation on some revs of
a4m072).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Initial support for Extreme Engineering Solutions XPedite5500 -
a P2020-based PMC/XMC single board computer.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add memory and I2C posts to the XPedite517x/520x/537x board families.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PIC's TFRR register doesn't affect hardware and is generally unused,
so use as storage for the POST word.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some U-Boot images for X-ES boards support multiple products in the same
family. For example, the XPedite5370, XPedite5371, and XPedite5372 are
similar enough that one U-Boot image can work on all 3 cards. To make it
clear that a U-Boot image can work on boards of the same family, rename
the boards with the least significant digit of 'x'.
While we're at it, change the board config file and make targets to be
lowercase.
Also change the default uImage and fdt filenames to "board.uImage" and
"board.dtb" to be more generic.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.
Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:
...
DTT: 53 C local / 64 C remote (adt7461@4c)
DTT: 54 C local (ds1621@48)
FLASH: Executed from FLASH1
POST memory PASSED
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
*** failed ***
### ERROR ### Please RESET the board ###
With this patch, NOR flash initialization is skipped:
...
DTT: 53 C local / 64 C remote (adt7461@4c)
DTT: 54 C local (ds1621@48)
FLASH: Executed from FLASH1
POST memory PASSED
FLASH: Uninitialized - Write Protect On
L2: 1024 KB enabled
NAND: 1024 MiB
...
Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Create a common checkboard() function to support all X-ES's Freescale
boards.
Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is. This allows one
U-Boot image to support multiple boards.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a new 'pci enum' command which re-enumerates the PCI buses. This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.
Also enable the 'pci enum' command for X-ES's Freescale-based boards.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The recent change the env code added an additional 32 bytes into gd_t
and that causes to grow pass the previous CONFIG_SYS_GBL_DATA_SIZE size.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This board is broken and impossible to repair without deep knowledge or
availability of the hardware.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Peter Tyser
Kumar Gala
Priyanka Jain
Haiying Wang
Wolfgang Denk
Prafulla Wadaskar
Gray Remlin
Shawn Guo
Sughosh Ganu
Mike Frysinger
Dirk Eibach
Andre Schwarz
Ilya Yanok
John Schmoller
Marek Vasut