Refactor display code to only setup hdmi if do_enable_hdmi() is invoked.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Add support for selecting display preset using the environment variable
"displaytype". This is a preparation for future merging of compulab
omap3_display.c display selection code with the cm-fx6 display selection code.
The "panel" environment variable is retained for backwards compatibility.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Implement a cm-fx6 specific board_video_skip() to provide the option to not
initialize the display.
The new function does not init display if the environment variable "panel" is
not defined, or if it is set to an unsupported value.
Collateral changes:
- Don't use the global displays array (it's CONFIG_IMX_VIDEO_SKIP specific).
- Don't use detect_hdmi(), since env controlled init makes it unnecessary.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
U-Boot does not explicitly assign the display to an IPU interface. Instead, it
relies on the power-on default of DI0.
Since the kernel reassigns HDMI display to DI1, after a warm reset the HDMI
display no longer works in U-Boot.
Fix this by explicitly assigning HDMI to IPU1 DI0 in U-Boot.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.
Build target: mx6qpsabreauto_config
Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)
CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Detect the SOC and board variant at runtime and change the dtb name,
but not hardcoding the fdt_file env variable.
Take the following patch as a reference.
Íd58699b157df75f1aa0b363ea9c21add21a0c
"mx6cuboxi: Load the correct 'fdtfile' variable"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Perfoming an OR operation on the error is not a good approach.
Return the error immediately for each ESDHC instance instead.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
The variable 'ret' is used to store the value returned by pfuze_mode_init(),
so it should be of type 'int' instead of 'unsigned int' in order to
correctly handle negative numbers.
Fix the variable type.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The variable 'ret' is used to store the value returned by pfuze_mode_init(),
so it should of type 'int' instead of 'unsigned int' in order to correctly
handle negative numbers.
Fix the variable type.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch adds support for the "OHB System AG" baseboard
with is equipped with the TQMa6S SoM.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Stefano Babic <sbabic@denx.de>
MARK_GRAPHICS_MEM_WRCOMB is not referenced anywhere in the code,
hence remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
enable_spi_clock does the same thing with enable_cspi_clock, so
remove enable_cspi_clock.
Remove enable_cspi_clock prototype in header file
convert cm_fx6/spl.c to use enable_spi_clk
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
When "scripts/get_maintainer.pl" parses "board/.../MAINTAINERS",
it uses the line containing board name as delimiter.
Without this line, the script happily mixes the lines from current
board MAINTAINERS file with lines from another file.
Fix it by adding a reasonable board name.
Tested by comparing output of:
cat board/st/stm32f429-discovery/MAINTAINERS
./scripts/get_maintainer.pl -f board/st/stm32f429-discovery
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: u-boot@lists.denx.de
To: Kamil Lulko <rev13@wp.pl>
Cc: Tom Rini <trini@konsulko.com>
This action is need to make I2C communication with PMIC
stable for low temperature. Print current I2C speed in
SPL for visual control.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
"omap_hwmod: dcan1: _wait_target_disable failed"
This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if it sees a transition on the
DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
while enabling/disabling DCAN1 module.
The hwmod layer enables and disables all modules at boot
and we have no opportunity to put the DCAN1 pins in safe mode
at that point.
DCAN1 is not used by u-boot so it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[trini: s/PULLUP/PULL_UP/ based on DRA7xx EVM version of this patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
"omap_hwmod: dcan1: _wait_target_disable failed"
This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if it sees a transition on the
DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
while enabling/disabling DCAN1 module.
The hwmod layer enables and disables all modules at boot
and we have no opportunity to put the DCAN1 pins in safe mode
at that point.
DCAN1 is not used by u-boot so it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros <rogerq@ti.com>
we currently use in-development IODelay values for DRA72x which are
proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet
Phy over RGMII. The PHY characteristics and routing choices made on
the EVM, make the current iodelay values fail ethernet communication.
Instead, we need to choose custom values for DRA72x-evm specifically
designed for the PHY and routing on the platform for ethernet to
function.
Cc: Nishanth Menon <nm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
am43xx_evm_ethboot/usbhost_boot_defconfig entries are
missing in MAINTAINER file. Adding entries for them.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This removes the following two warnings from buildman:
WARNING: no status info for 'cairo'
WARNING: no maintainers for 'cairo'
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Sinlinx SinA33 is a core/daughter board SDK kit from Sinlinx. It has
the A33 SoC, USB host, USB OTG, audio input/output, LCD, camera, SDIO
and GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>
Looks like I forgot to add myself as a maintainer for AXS103 defconfig.
Fixing this now.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@konsulko.com>
With new SMP-enabled CPUs with ARC HS38 cores and corresponding support
in Linux kernel it's required to add basic SMP support in U-Boot.
Currently we assume the one and only core starts execution after
power-on. So most of things in U-Boot is handled in UP mode.
But when U-Boot is used for loading and starting Linux kernel right
before jumping to kernel's entry point U-Boot:
[1] Sets all slave cores to jump to the same address [kernel's entry
point]
[2] Really starts all slav cores
In ARC's implemetation of SMP in Linux kernel all cores are supposed to
run the same start-up code. But only core with ID 0 (master core)
processes further while others are looping waiting for master core to
complete some initialization.
That means it's safe to un-pause slave cores and let them execute kernel
- they will wait for master anyway.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
This reverts commit f76eba38b3.
This patch did not have a full and proper copyright/S-o-b chain.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Conflicts:
include/configs/sun6i.h
include/configs/sun8i.h
Now that we have the Kconfig based CPU type selection,
use this to fill the IMX_CONFIG automatically
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
This is the first patch to remove the
CONFIG_SYS_EXTRA_OPTIONS.
This patch implements CPU type selection from Kconfig.
Further Kconfig stuff is added later.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Some archs/boards specify their own default by pre-defining the config
which causes the Kconfig system to mix up the order of the configs in
the defconfigs... This will cause merge pain if allowed to proliferate.
Remove the configs that behave this way from the archs.
A few configs still remain, but that is because they only exist as
defaults and do not have a proper Kconfig entry. Those appear to be:
SPIFLASH
DISPLAY_BOARDINFO
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates,
drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
Update new naming scheme.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
rastaban is a draco version with more flash, more RAM
and faster CPU. Number of partitions is the same but
rootfs partition is different.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
BeagleBoard-X15 uses a vtt regulator for DDR3 termination
and this is controlled by gpio7_11. Configuring gpio7_11.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
updates for the siemens am335x based boards:
- draco: add delay for DDR3 configuration
- change MTD partition layout and add a possibility
to redefine MTD layout in board header.
- move ubi support to common header file
- draco: improve dtb naming
- draco: set CONFIG_SYS_CBSIZE to 1024
- add generic env based led
Leds can now be defined in Environment
- add generic env based dfu button
Which gpio is used for the dfu button can be defined
through the Environment
- set MACH_TYPE only if defined
- draco: increase CPU freq to 300MHz
- Add time command to siemens am33xx boards
- DDR3: increase default tRFC
- draco: enable pullup for DFU and ERST pin
- change print format DDR3
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
in future we support yet another b&r am335x based board, where Timer 5 is
wired to backlight-driver.
So we introduce a new driver-type '2' to setup timer5 instead timer6.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vision Systems's Baltos is based on AM335x SoC
from Texas Instruments. This patch adds support
such Industrial PCs in mainline u-boot.
[ balbi@ti.com: updated original patch to current u-boot ]
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would use to
configure, when we have not yet configured the board yet. In other cases
update the call to be as functional as before and check an already
programmed value in.
Tested-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The Calxeda highbank SOC needs a custom sequence to bring up SATA links,
so override ahci_link_up with custom function to handle combophy setup.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Richard Gibbs
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andre Przywara <osp@andrep.de>
Nikita Kiryanov
Peng Fan
Otavio Salvador
Fabio Estevam
Stefan Roese
Bin Meng
Minkyu Kang
Antonio Borneo
Yegor Yefremov
Roger Quadros
Mugunthan V N
Lokesh Vutla
Albert ARIBAUD \(3ADEV\)
Chen-Yu Tsai
Vikas Manocha
Alexey Brodkin
Ian Campbell
Markus Niebel
Joe Hershberger
Heiko Schocher
Łukasz Majewski
Hannes Petermaier
Tom Rini
Mark Langsdorf