clean up IXP PCI handling: get rid of IXP-private bus scan, BAR assign etc.
code and use u-boot's PCI infrastructure instead. Move board-specific PCI
setup code (clock/reset) to board directory.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
- jump to real flash location after reset before turning off flash mirror
- fix timer system to use HZ == 1000, remove broken interrupt-based code
Signed-off-by: Michael Schwingen <michael@schwingen.org>
The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it. Drop it.
This includes support for VFD displays which have always been used by
this board only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme
* Fix: timer.c compile error io.h not found with arm/at91rm9200
* update arm920t/at91 to ATMEL_xxx name scheme
* update arm920t/at91 soc lib
* update at91_emac driver
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
Based on ST-Ericsson internal git repo.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Albert Aribaud <albert.aribaud@free.fr>
This patch added set_mmc_clk for external clock control.
c210 didn't support host clock control.
So We need external_clock_control function for c210.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
S5PC210 SoC have two cpu revisions, and have some difference.
So, support the cpu revision for each revision.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
S5PC2XX: Macro values for Pull Up and Driver Strength were wrong.
S5PC1XX: Macro values for Driver Strength were wrong.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch allow to override CONFIG_SYS_TCLK from board configuration
files. This is needed for the Network Space v2 which use a non standard
core clock frequency (166MHz instead of 200MHz for a 6281 SoC).
As a possible enhancement for 6281 and 6282 devices, TCLK could be
dynamically detected by checking the Sample at Reset register bit 21.
Additionally this patch fix a typo.
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Drop warnings in get_cpu_rev and changes the return value
(a u32 instead of char * is returned) of the function
to be coherent with other processors.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundel <dzu@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.
This change will let other SoC which also use ftsmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Move the header file "ftsdmc020.h" (SDRAM Controller)
to "include/faraday" folder.
This change will let other SoC which also use ftsdmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
The reset sequence/configuration for ehci is highly board specific,
so this will be done in the source for the board, instead of
introducing several CONFIG_* which would be needed to make those
few lines in beagle.c usable across different OMAP boards.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"include/faraday" folder.
This change will let other SoC which also use fttmr010
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Add i2c_clk_enable in the cpu specific code, since previous platform it,
while new platform don't need. In the pantheon and armada100 platform,
this function is defined as NULL one.
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
This allows the reading of EEPROMS on the expansion bus without adding
external pull-ups.
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Drop warnings due to recent commit
ARM: mx31: Print the silicon version
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers)
renamed mx31-imx-regs.h to imx-regs.h.
Change the file label accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.
Tested on a MX31PDK with a 2.0 silicon, where it shows:
CPU: Freescale i.MX31 rev 2.0 at 531 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
As exception among the i.MX processors, the i.MX31 has headers
without general names (mx31-regs.h, mx31.h instead of imx-regs.h and
clock.h). This requires several nasty #ifdef in the drivers to
include the correct header. The patch cleans up the driver and
renames the header files as for the other i.MX processors.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch add CONFIG_HW_WATCHDOG to be used
with the internal watchdog timer of the MX31
processor. Two function are exported for the
board maintainers:
mxc_hw_watchdog_enable
mxc_hw_watchdog_reset
The board maintainer can decide to use mxc_hw_watchdog_reset as
hw_watchdog_reset, or to implement his own function to reset
the watchdog.
The watchdog timer can be configured with CONFIG_SYS_WD_TIMER_SECS
(value in seconds). The MX31 allows values between 0.5
(CONFIG_SYS_WD_TIMER_SECS = 0) and 128 seconds.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The MMC registers are accessed through struct s5p_mmc member
variables. MMC controller "control4" register offset is set
to 0x8C as per data sheet. The size of struct s5p_mmc is also
corrected.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Michael Schwingen
Wolfgang Denk
Eric Benard
Jens Scharsig
John Rigby
Jaehoon Chung
Minkyu Kang
Chander Kashyap
Stefano Babic
Reinhard Meyer
Simon Guinot
Macpaul Lin
Tom Warren
Luca Ceresoli
Alexander Holler
Albert ARIBAUD
Rogan Dawes
Lei Wen
Matthias Weisser
Steve Kipisz
Fabio Estevam
Donghwa Lee