The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Rename init_addr and init_ext_addr to match the docs between
85xx and 86xx. Both now use 'init_addr' and 'init_ext_addr'.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't. Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.
My bad. Lovely Wednesday with git bisect. You know.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars. Fix this by removing the 85xx cruft from the
86xx codebase.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
- Convert the CPM2 based functionality to use new CONFIG_CPM2
option rather than a myriad of CONFIG_MPC8560-like variants.
Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
Eliminates the CONFIG_MPC8560 option entirely. Distributes the
new CONFIG_CPM2 option to each 8260 board.
- Added Motorola CPU 8540/8560 support (cpu/85xx)
- Added Motorola MPC8540ADS board support (board/mpc8540ads)
- Added Motorola MPC8560ADS board support (board/mpc8560ads)
* Minor code cleanup
Jean-Christophe PLAGNIOL-VILLARD
Jason Jin
Wolfgang Denk
Kumar Gala
Jon Loeliger
Haiying Wang
Jon Loeliger
wdenk