- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size
as header is appended to u-boot image. So header will also be
copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for the
header.
- Reduce the size of CAAM driver for SPL Blobification functions
and descriptors, that are not required at the time of SPL are
disabled. Further error code conversion to strings is disabled
for SPL build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add NAND secure boot target for ls1043ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- MACRO for CONFIG_BOOTSCRIPT_COPY_RAM is enabled to copy Bootscript
from NAND to DDR. Offsets for Bootscript on NAND and DDR have been
also defined.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
- Add SD secure boot target for ls1043ardb.
- Implement FSL_LSCH2 specific spl_board_init() to setup CAAM stream
ID and corresponding stream ID in SMMU.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size as
header is appended to u-boot image. So header will also be copied
from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for secure
boto header.
- Error messages during SPL boot are limited to error code numbers
instead of strings to reduce the size of SPL image.
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
only ddr_init and board_early_init_f funcations in case of SPL
build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.
It provides the following feature set:
* up to 4GB DDR3
* on-module SPI-NOR flash
* on-module eMMC (with 8-bit interace)
* SD card (on a baseboad) via edge connector
* Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
* HDMI/eDP/MIPI displays
* 2x MIPI-CSI
* USB
- 1x USB 3.0 dual-role (direct connection)
- 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
* on-module STM32 Cortex-M0 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller
Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixed build warning on puma-rk3399:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Update the configuration files to support the device tree and driver
model, so do SPL. The device clock and pins configuration are handled
by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Fix build error with sama5d3_xplained_mmc:
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Remove CONFIG_PHY_MICREL as per previous patch:
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and
driver model, so do SPL. The device clock and pins configuration
are handled by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Add back CONFIG_PHY_MICREL to prevent a build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Toradex Colibri Vybrid
module.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Rename CONFIG_FSL_DCU_FB to CONFIG_VIDEO_FSL_DCU_FB
and convert it to Kconfig.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Update the configuration files to support the device tree and driver
model, so do SPL. The device clock and pins configuration are handled
by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Update the configuration files to support the device tree and
driver model, so do SPL. The device clock and pins configuration
are handled by the clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.
Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.
Signed-off-by: Simon Glass <sjg@chromium.org>
Logic PD has an i.MX6Q system on module (SOM) with a development kit. The
SOM has a built-in microSD socket, DDR and NAND flash. The development kit
has an SMSC Ethernet PHY, serial debug port and a variety of peripherals.
This have been verified to boot the i.MX6Q version over either SD
on the development kit or NAND built into the SOM. Items in the dtsi file
are specific to the SOM itself. Items in the dts file are in the baseboard.
Future versions of the SOM will come out supporting the same basebord and
potentially future base boards will come out supporting the same SOM.
Signed-off-by: Adam Ford <aford173@gmail.com>
Explain how to flash the eMMC and how to boot from it.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
Change the PMIC bulk configuration from auto mode to sync mode to avoid the voltage shutdown issue
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
Add the configuration options for display initialization in case we need to
do the display initialization in kernel to support different timing settings
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
spl_mmc.c calls mmc_initialize(). This symbol is provided in
drivers/mmc/mmc.c when CONFIG_GENERIC_MMC is enabled.
The sunxi Kconfig case is an oddball because it redefines
SPL_MMC_SUPPORT.
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
[trini: Update arch/arm/cpu/armv8/zynqmp/Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
BeagleBone Blue is next grenation of boards from BeagleBoard.org, focusing
on robotics with a TI wl1835 wireless module for connectivity.
This board can be indentified by the BLAx value after A335BNLT (BBB)
in the at24 eeprom:
BLAx: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 4c 41 30 |.U3.A335BNLTBLA2|]
http://beagleboard.org/bluehttps://github.com/beagleboard/beaglebone-blue
firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
SeeedStudio BeagleBone Green Wireless (BBGW) is an expansion of the
SeeedStudio Green (BBG) with the Ethernet replaced by a TI wl1835
wireless module.
This board can be indentified by the GW1x value after A335BNLT (BBB)
in the at24 eeprom:
GW1x [aa 55 33 ee 41 33 33 35 42 4e 4c 54 47 57 31 41 |.U3.A335BNLTGW1A|]
http://beagleboard.org/green-wirelesshttp://wiki.seeed.cc/BeagleBone_Green_Wireless/
firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: Stored in at24 eeprom at address 5-16:
hexdump -e '8/1 "%c"' /sys/bus/i2c/devices/0-0050/eeprom | cut -b 5-16
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
BeagleBone Black Wireless is clone of the BeagleBone Black (BBB) with
the Ethernet replaced by a TI wl1835 wireless module.
This board can be indentified by the BWAx value after A335BNLT (BBB)
in the at24 eeprom:
BWAx [aa 55 33 ee 41 33 33 35 42 4e 4c 54 42 57 41 35 |.U3.A335BNLTBWA5|]
http://beagleboard.org/black-wirelesshttps://github.com/beagleboard/beaglebone-black-wireless
firmware: https://github.com/beagleboard/beaglebone-black-wireless/tree/master/firmware
wl18xx mac address: /proc/device-tree/ocp/ethernet@4a100000/slave@4a100200/mac-address
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Will Newton <willn@resin.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
As per the latest pinmux data available for AM572x EVM,
rev A3, input should be enabled on MMC clock lines for
MMC2/2/3 for stable operation.
Further, AM572x TRM, SPRUHZ6, Revised June 2016, in
section 18.4.6.1.1 "Pad Configuration Registers" states
that input should be enabled for MMC 2/3/4 clock lines.
Enable input on MMC1 and MMC3 clock to match the latest
pinmux data. Input is already enabled on MMC2 clock for
BeagleBoard x15. Further, input is already enabled on all
MMCx clocks for other AM57xx boards (AM572x and AM571x
IDK).
Tested with HS and UHS SD card on AM572x EVM Rev A3.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The Sunchip CX-A99 is a board used in some media players. It features:
An Allwinner A80 ARM SoC (4 * Cortex-A7 + 4 * Cortex-A15 cores)
2 GiB or 4 GiB DDR3 DRAM
AXP808 PMIC
16 GB or 32 GB eMMC
SDIO Wifi/Bluetooth/FM module
SD card slot
1 USB 3.0 connector
2 USB 2.0 connectors
SATA connector
UART connector (internally) for serial console
Ethernet connector (10/100/1000 Mbit/s)
HDMI connector
Composite video and analog audio connector
S/PDIF connector
IR remote control receiver
This patch adds a defconfig for the board. The DRAM settings are as found
in the vendor sys_config.fex file.
It has a preliminary device tree for use until a device tree is accepted
upstream, after which it can be replaced by the upstream version.
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
[squash commits, and edited new meanful commit message]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Introduce a new sunxi-spl-with-ecc.bin image with already the right header,
ECC, randomizer and padding for the BROM to be able to read it.
It needs to be flashed using a raw access to the NAND so that the
controller doesn't change a thing to it, since we already have all the
right parameters.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove the board_power_init() function.
It will be initialized with device-tree.
In future, it will be controlled with regulator API.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove the unused functions.
Never call the get_soft_i2c_scl/sda_pin() aynwhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove the board_i2c_init() function.
i2c should be initialized with device-tree file.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
With d53ecad92f some unused interrupt related code was removed.
However all of these options are currently unused. Rather than migrate
some of these options to Kconfig we just remove the code in question.
The only related code changes here are that in some cases we use
CONFIG_STACKSIZE in non-IRQ related context. In these cases we rename
and move the value local to the code in question.
Fixes: d53ecad92f ("Merge branch 'master' of git://git.denx.de/u-boot-sunxi")
Signed-off-by: Tom Rini <trini@konsulko.com>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
At present we cannot use this function as an init sequence call without a
wrapper, since it returns the RAM size. Adjust it to set the RAM size in
global_data instead, and return 0 on success.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This is not used by any board. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Clean up board_f sequence a little
This series tries to remove #ifdefs from the board_f init sequence. It
gets as far as I2C and then we need to discuss whether we can start to
remove the old I2C framework.
I think that ideally each entry in the init sequence should be enabled by
at most one CONFIG, which is in Kconfig and is not arch-specific.
END
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
There is no good reason to use a different name on PowerPC. Change it to
timer_init() like the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Ruchika Gupta
Vinitha Pillai-B57223
Sumit Garg
Klaus Goger
Wenyou Yang
Marek Vasut
Stefan Agner
Sanchayan Maity
Simon Glass
Adam Ford
Breno Lima
Yung-Ching LIN
Alexandru Gagniuc
robertcnelson@gmail.com
Patrice Chotard
Sekhar Nori
Rask Ingemann Lambertsen
Maxime Ripard
Jaehoon Chung
Tom Rini