9bc97a3d91
Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pci
19 years ago
71b405df4e
Merge with /home/sr/git/u-boot/cfi-flash
19 years ago
197b049b8b
Merge with /home/sr/git/u-boot/4xx-sdram
19 years ago
2fc000d756
Remove dependencies between DoC code and old legacy NAND driver.
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Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
19 years ago
1707626650
Correct PM828_PCI_config Makefile target.
19 years ago
db28ddb4da
Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S
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Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
19 years ago
534ff676a9
* Add support for ymodem protocol download
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Patch by Stefano Babic, 29 Mar 2006
* Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000
Merge with /home/mk/8-benq/u-boot
19 years ago
2662b40cac
* Changes/fixes for drivers/cfi_flash.c:
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- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
19 years ago
d87080b721
GCC-4.x fixes: clean up global data pointer initialization for all boards.
19 years ago
3511853943
Reorder CHANGELOG
19 years ago
62534beb2f
Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
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405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
19 years ago
9e7b5ce61b
delta board: one more DA9030 fix.
19 years ago
f2841d3770
Add support for ymodem protocol (loady command).
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Patch by Stefano Babic, 29 Mar 2006
19 years ago
eeaab720f6
Change delta board memory map to start at 0x80000000.
19 years ago
89f2dfa4c3
delta board: minor update to DA9030 code.
19 years ago
b66a938342
Set SDelay register in the DDR controller for the MPC5200B chip.
19 years ago
c855ef6768
delta board: fix DA9030 reset procedure.
19 years ago
f6dbbe9864
Update CHANGELOG
19 years ago
2770bcb21c
Merge with http://www.denx.de/git/u-boot.git
19 years ago
0b953ffc65
Monahans related documentation update.
19 years ago
40b0bafbb2
Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and
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CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core
frequency.
19 years ago
ba70d6a417
delta board: DA9030 initialization and i2c support. Some minor changes to
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make the pxa i2c driver work with the monahans cpu.
19 years ago
05d8dce9d0
Enable Quad UART om MCC200 board.
19 years ago
5725f94aac
Cleanup MCC200 board configuration; omit non-existent stuff.
19 years ago
552fc624f2
Cleanup of the monahans cpu and delta board port.
19 years ago
e443c944cf
Support for redundant environment in NAND Flash.
19 years ago
0b6ba547fa
Update CHANGELOG
19 years ago
7b4fd36b03
Add support for MPC859/866 Rev. A.0
19 years ago
0a112d8696
Merge with port of MPC8349EMDS board
19 years ago
09e4b0c5d3
Add support for Lite5200B board.
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Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
19 years ago
dc9e499c62
Support for DDR with 32-data path. Addotional notes on injecting
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multiple-bit errors.
19 years ago
d326f4a242
Add command for handling DDR ECC registers on MPC8349EE MDS board.
19 years ago
97f98001a3
Fix DDR ECC bit definitions for MPC83xx.
19 years ago
991425fe05
Add initial support for MPC8349E MDS board.
19 years ago
4c8d1ecce2
Add support for ECC DDR initialization on MPC83xx.
19 years ago
61f25155ac
Add DMA support for MPC83xx.
19 years ago
6d8ae5abb5
Add sync in do_reset() routine for MPC83xx after RPR register
...
was written to. It is need on some targets when BAT translation
is enabled.
19 years ago
e24e0f0744
Add bit definitions for MPC83xx DDR controller registers.
19 years ago
cd94ba397e
Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.
19 years ago
a7c66ad2e5
Correct shift offsets in icache_status and dcache_status for MPC83xx.
19 years ago
6e53e27c50
Add support for DS1374 RTC chip.
19 years ago
ff7fefe679
Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer and
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cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories
Patch by Andreas Engel, 13 Mar 2006
19 years ago
86f5f0342d
Fix CHANGELOG entry (patch date)
19 years ago
15940c9af3
Change max size of uncompressed uImage's to 8MByte and add
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CFG_BOOTM_LEN to adjust this setting.
As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
uImages was restricted to 4MBytes. This default size is now
increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
in the board config file.
Patch by Stefan Roese, 13 Mar 2006
19 years ago
f3fecfe6d7
Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c
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Patch by Stefan Roese, 13 Mar 2006
19 years ago
9a7b408c11
cpu/ppc4xx/start.S : exceptions are enabled after relocation
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Patch by Cedric Vincent, 6 June 2005
19 years ago
9551530615
au1x00_eth.c: check malloc return value and abort if it failed
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Patch by Andrew Dyer, 26 Jul 2005
19 years ago
c15f80eaef
Change the sequence of events in soft_i2c.c:send_ack() to keep from
...
incorrectly generating start/stop conditions on the bus.
Patch by Andrew Dyer, 26 Jul 2005
19 years ago
b38dbd4622
Fix bug in [id]cache_status commands for MPC85xx processors;
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should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
19 years ago
f07217c9e2
Fix array overflow with fw_setenv on uninitialised environment
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Patch by Murray Jensen, 15 Jul 2005
19 years ago
Wolfgang Denk
Marian Balakowicz
Wolfgang Denk
Stefan Roese
Markus Klotzbuecher
Rafal Jaworowski
Wolfgang Denk