Replace the custom sr32() bit manipulation function in
arch/arm/cpu/armv7/omap3/board.c and board/ti/panda/panda.c
by standard I/O accessors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
With uppcoming BCH support on OMAP devices we need to decide between differnt
algorithms when switching the ECC engine. Currently we support 1-bit hammign
and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the
interface of omap_nand_switch_ecc() also.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
No functional changes, just more comments for readability when a
preprocessor check spans more than a few lines, and for consistency.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings
currently. Re-order functions so that we don't have that anymore.
Signed-off-by: Tom Rini <trini@ti.com>
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer,
clear the BSS and call board_init_r. We mark this as weak as some
platforms may need to perform additional initalization at this point.
We provide a gd that we know will be in a usable location, once the BSS
has been cleared to help with this as well. Finally, we no longer call
relocate_code so remove that from the armv7 version.
Next, both board_init_f and jump_to_image_linux are going to be
inherently arch-specific, so move these versions to arch/arm/lib/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards. We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave
the NAND one in-place as we plan to replace it later in this series.
We use common/spl to avoid linker problems with respect to merging
constant strings in objects. Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.
Signed-off-by: Tom Rini <trini@ti.com>
This is an OMAP/related-specific function, move calling it to
spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that
enabled NAND and didn't enable this already.
Signed-off-by: Tom Rini <trini@ti.com>
Move the default omap/related-centric board_mmc_init to
arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines
to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE
Signed-off-by: Tom Rini <trini@ti.com>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and
add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.
Signed-off-by: Tom Rini <trini@ti.com>
Introduce a __weak misc_init_r function that just runs dieid_num_r().
Remove misc_init_r from cm_t35, mcx, omap3_logic and mt_ventoux as this was
all they did for misc_init_r.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Call i2c initialization in spl_board_init only if I2C
is configured for the board.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Simon Schwarz <simonschwarzcor@gmail.com>
Mainline kernel for OMAP3 doesn't enable L2 cache
It expects L2$ to be enabled by ROM-code/bootloader.
Leaving L2$ enabled can be troublesome in cases where
the L2 cache is not under CP15 control, such as in
Cortex-A9. This problem is explained in detail in
the commit dc7100f408
However, this problem doesn't apply to Cortex-A8
because L2$ in Cortex-A8 is under CP15 control and
hence the generic armv7 maintenance opertions work
for it.
As such we can make an exception for OMAP3 and
leave the L2$ enabled when we jump to kernel. This
is done by removing the strongly-linked implementation
of v7_outer_cache_disable() and allowing it to fall
back to the weakly linked implementation that doesn't
do anything.
Signed-off-by: Aneesh V <aneesh@ti.com>
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4
doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000.
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
There is no need to have such a function twice.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
There is no need to have such a function twice.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
We add an weak version of omap_rev_string in omap-common/spl.c
and while at it drop the omap3 version. Move the prototype over
to <asm/omap_common.h> with the other SPL functions.
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9
Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.
The two architectures are similar enough that substantial code can be shared.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
initialized for CS1
From: Vaibhav Hiremath <hvaibhav@ti.com>
The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
initialized for CS1
From: Vaibhav Hiremath <hvaibhav@ti.com>
The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
725233: PLD instructions executed with PLD data forwarding
enabled can result in a processor deadlock
This deadlock can happen when NEON load instructions are used together
with cache preload instructions (PLD). The problematic conditions
can be triggered in-the-wild by NEON optimized functions from pixman
library (http://cgit.freedesktop.org/pixman), which perform dynamic
adjustment of prefetch distance.
The workaround disables PLD data forwarding by setting PLD_FWD bit
in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8
errata list.
The deadlock can only happen on r1pX revisions of Cortex-A8 (used in
OMAP34xx/OMAP35xx). Performance impact of the workaround is practically
non-existant.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains. Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such runtime support code in U-Boot. A closer look at the code
indicated that some of these issues are actually home-made. This
patch attempts to clean up some of the most obvious problems and make
building of U-Boot with different tool chains easier:
- Even though all ARM systems basicy used the same compiler options
to select a specific ABI from the tool chain, the code for this was
distributed over all cpu/*/config.mk files. We move this one level
up into lib_arm/config.mk instead.
- So far, we only checked if "-mapcs-32" was supported by the tool
chain; if yes, this was used, if not, "-mabi=apcs-gnu" was
selected, no matter if the tool chain actually understood this
option. There was no support for EABI conformant tool chains.
This patch implements the following logic:
1) If the tool chain supports
"-mabi=aapcs-linux -mno-thumb-interwork"
we use these options (EABI conformant tool chain).
2) Otherwise, we check first if
"-mapcs-32"
is supported, and then check for
"-mabi=apcs-gnu"
If one test succeeds, we use the first found option.
3) In case 2), we also test if "-mno-thumb-interwork", and use
this if the test succeeds. [For "-mabi=aapcs-linux" we set
"-mno-thumb-interwork" mandatorily.]
This way we use a similar logic for the compile options as the
Linux kernel does.
- Some EABI conformant tool chains cause external references to
utility functions like raise(); such functions are provided in the
new file lib_arm/eabi_compat.c
Note that lib_arm/config.mk gets parsed several times, so we must
make sure to add eabi_compat.o only once to the linker list.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Dirk Behme <dirk.behme@googlemail.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Andrzej Wolski <awolski@poczta.fm>
Tested-by: Gaye Abdoulaye Walsimou <walsimou@walsimou.com>
Tested-by: Tom Rix <Tom.Rix@windriver.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.
Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.
This patch cleans this up - for example:
Before:
=> help dtt
dtt - Digital Thermometer and Thermostat
Usage:
dtt - Read temperature from digital thermometer and thermostat.
After:
=> help dtt
dtt - Read temperature from Digital Thermometer and Thermostat
Usage:
dtt
Signed-off-by: Wolfgang Denk <wd@denx.de>
Use the functions print_cpuinfo() and checkboard() to
display the cpu and board specific information.
These functions reuse content from the existing function
display_board_info() - which has been removed.
Also, updated the existig OMAP3 configurations to
define:
- CONFIG_DISPLAY_CPUINFO
- CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Sanjeev Premi <premi@ti.com>
Fixes this compile error:
board.c: In function 'do_switch_ecc':
board.c:339: error: 'cmd_tbl_t' has no member named 'help'
make[1]: *** [board.o] Error 1
make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3'
make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2
This is due to the fact that current command uses long
help for the usage print even if the CONFIG_SYS_LONGHELP
is not enabled. (Thanks Jean-Christophe for explanation).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Wolfgang Denk
Heiko Schocher
Andreas Bießmann
Enric Balletbo i Serra
Nikita Kiryanov
Robert P. J. Day
Tom Rini
Stefano Babic
Aneesh V
Peter Meerwald
Govindraj.R
Andreas Müller
Alexander Holler
Simon Schwarz
Mans Rullgard
Steve Sakoman
Vaibhav Hiremath
Peter Tyser
Siarhei Siamashka
Tom Rix
Dirk Behme
Kim, Heung Jun
Sanjeev Premi