This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
finish off what commit 43ddd9c820,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.
Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.
This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:
CHIP_11: End of memory range area restricted access.
Category: 3
Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.
Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.
Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.
This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia
The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:
PMC440.h:
/* esd expects pram at end of physical memory.
* So no logbuffer at the moment.
*/
It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.
Signed-off-by: Stefan Roese <sr@denx.de>
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Save FIT configuration provied in the first bootm argument and use it
when to get ramdisk/FDT subimages when second and third (ramdisk/FDT)
arguments are not specified.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch allocates a set of show_boot_progress() IDs for new uImage format
and adds show_boot_progress() calls in new uImage format handling code.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.
Use r2 instead.
Signed-off-by: Wolfgang Denk <wd@denx.de>
allow to load the microde from flash or ram by download it through
the serial or other.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stefan Roese <sr@denx.de>
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family. Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[PATCH] net: add 'ethrotate' environment variable
This patch replaces the buildtime configuration option
CONFIG_NET_DO_NOT_TRY_ANOTHER through the 'ethrotate' runtime
configuration veriable. See README.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.
See README for the new options:
CONFIG_FPGA,
CONFIG_FPGA_<vendor>,
CONFIG_FPGA_<family>
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
from the bootp server
Signed-off-by: Wilson Callan <wcallan@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
All of the choices for CONFIG_BOOTP_ are now documented in
the README file. You must now individually select exactly
the set that you want using a series of
#define CONFIG_BOOTP_<x>
statements in the board port config files now.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch adds USB event poll support, which could be used in usbkbd
and other usb devices driver when the asynchronous interrupt
processing is supported.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com
This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
Signed-off-by: Stefan Roese <sr@denx.de>
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: Timur Tabi <timur@freescale.com>
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
Hello,
Attached is a patch providing support for multiple I2C buses at the
command level. The second part of the patch includes an implementation
for the MPC834x CPU and MPC8349EMDS board.
/*** Note: This patch replaces ticket DNX#2006083042000018 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Overview:
1. Include new 'i2c' command (based on USB implementation) using
CONFIG_I2C_CMD_TREE.
2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that
the commands to change bus number and speed are only available under the
new 'i2c' command mentioned in the first bullet.
3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form
of an array of bus-device pairs. Otherwise, it is an array of uchar.
CHANGELOG:
Added new 'i2c' master command for all I2C interaction. This is
conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for
setting I2C bus speed as well as changing the active bus if the board
has more than one (conditionally compiled with
CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses.
Updated README.
regards,
Ben
Guennadi Liakhovetski
Bartlomiej Sieka
Daniel Hellstrom
Kim Phillips
Andre Schwarz
Aras Vaichas
Stefan Roese
Anatolij Gustschin
Joakim Tjernlund
Wolfgang Denk
Jerry Van Baren
Tor Krill
Marian Balakowicz
Mike Frysinger
Jean-Christophe PLAGNIOL-VILLARD
TsiChungLiew
Ben Warren
Matthias Fuchs
Heiko Schocher
Marcel Ziswiler
Haavard Skinnemoen
Bruce Adler
David Updegraff
Wilson Callan
Jon Loeliger
Jon Loeliger
Heiko Schocher
Zhang Wei
Michal Simek
Gerald Van Baren
Rodolfo Giometti
Wolfgang Denk
Timur Tabi
Ben Warren